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High speed emulator used for digital signal processor and operation method thereof

A digital signal and emulator technology, applied in the field of digital signal processors, can solve the problems that restrict the development and debugging of digital signal processors, and achieve the effects of improving simulation efficiency and processing speed, improving interaction speed and simulation speed, and enhancing functions

Inactive Publication Date: 2007-09-26
SHANGHAI HUALONG INFORMATION TECH DEV CENT
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Problems solved by technology

[0009] At present, the emulation mode of emulators that are widely used is relatively simple. The general method is that the emulation host completes all the debugging operation analysis, refines to the final debugging instruction operation, and then sends the debugging instructions to the target digital signal processing through the emulator. Debugging is completed in the emulator, and the role of the emulator is to convert the debugging instructions sent by the emulation host into the general debugging interface JTAG interface protocol signal, which itself does not have additional functions. The operation of such an emulator is simple and inefficient. Seriously restrict the development and debugging of digital signal processors

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  • High speed emulator used for digital signal processor and operation method thereof
  • High speed emulator used for digital signal processor and operation method thereof
  • High speed emulator used for digital signal processor and operation method thereof

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Embodiment Construction

[0046] The present invention will be further described in detail below in conjunction with the accompanying drawings.

[0047] According to the content of the invention above, the present invention is an emulator of a digital signal processor based on a PCI interface and a JTAG interface. The emulator is used in a digital signal processor debugging system, and is interconnected with a debugging host through a PCI board (PCI interface), and interconnected with a target processor through a JTAG interface. It contains the above two interface control logics and the main controller unit. The main controller unit contains DMA controller logic and macro instruction parsing logic. By using DMA operation, the interactive speed and simulation speed of debugging data can be greatly improved. Using the macro instruction parsing operation facilitates the development of simulation software of the debugging host and enhances more simulation debugging functions.

[0048] As shown in Figure...

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Abstract

This invention discloses one simulation device and its operation method for digital signal processor transfer system, wherein, the device is connected to the modulation host through PCI board card and to aim processor through JTAG interface; its inside structure comprises interface control logical device and main controller unit; the main controller unit comprises DMA controller logics and macro order analysis logics to improve modulation data interacting speed and simulation speed through DMA operations.

Description

Technical field: [0001] The invention relates to a digital signal processor with a new structure and function, in particular to a high-speed emulator with DMA function applied to a 16-bit digital signal processor. Background technique: [0002] As we all know, a digital signal processor (DSP) is a highly specialized MCU (microcontroller), and its structure is suitable for running a small number of special instructions and special operations at a speed as fast as possible. High-speed execution capability is necessary for processing real-time analog signals in a digital environment, and DSP is suitable for these operations. [0003] As a key part of the complete development system of the digital signal processor, the simulation debugging system plays a decisive role. As shown in Figure 1, it is one of the basic components that constitute a standard development environment for digital signal processors. Based on a DSP emulation debugging system, software program developers ca...

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Application Information

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IPC IPC(8): G06F11/36
Inventor 刘春晖李兴仁金荣伟林锦麟张达文杨一茜
Owner SHANGHAI HUALONG INFORMATION TECH DEV CENT
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