Chip data output signal protection method and its circuit

Abstract

The invention provides a method for protecting chip data output signal and its circuit. The invention relates to an embedded chip interface, in particular to a method for protecting chip interface data output signal and its circuit. The data output signal in the chip is outputed by the pin line of chip output interface via the gating circuit. In the debug stage of system design, the time delay circuit in the control logic circuit, under the action of reset signal in the chip, generates the time delayed signal to act on the gating circuit for prohibiting data signal from being outputed and controlling the output controlling register in the logic circuit to output the default value, after signal is delayed, the gating circuit is allowed to output data signal. In the normal working stage of chip, the output controlling register in the control logic circuit recieves the read-in data instruction of CPU in the chip, in the effective date of time delayed signal, the read-in data instruction places the number for the output controlling register through the CPU port and prohibits the gating circuit from outputing data signal. The protection method and circuit has simple stucture, and can prevent the leakage of chip code without the special process.

Description

technical field [0001] The invention relates to an embedded chip interface, in particular to an interface data output signal protection method and a circuit thereof. Background technique [0002] Many embedded SOCs (System On Chip) are embedded with FLASH flash memory to reduce chip pins. The JTAG interface is a general debugging interface, which must be reserved for each SOC. Through the JTAG interface, data can be written to the embedded FLASH flash memory. , data can also be read out, so the code cannot be protected. The existing technology often adopts a fuse technology method. After the code is burned into the FLASH flash memory, the connection of the JTAG interface signal is fused inside the chip with the fuse technology. This method solves the problem of code protection from the source, but the fuse The silk process is a special process, which leads to problems such as increased chip costs and production difficulties. Contents of the invention [0003] The purpose...

AI Technical Summary

Problems solved by technology

[0002] Many embedded SOCs (System On Chip) are embedded with FLASH flash memory to reduce chip pins. The JTAG interface is a general debugging interface, which must be reserved for each SOC. Through the JTAG interface, data can be written to the embedded FLASH flash memory. , can also read out the data, so the code cannot be protected

The existing technology often adopts a fuse technology method. After the code is burned into the FLASH flash memory, the connection of the JTAG interface signal is fused inside the chip with the fuse technology. This method solves the problem of code protection from the source, but the fuse The silk process is a special process, which leads to problems such as increased chip costs and production difficulties.

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