[0028] The technical scheme of the present invention will be described in detail below through several structural schematic diagrams of embodiments of the physical layer PHY chip disclosed in the present invention. As far as the present invention is concerned, the physical layer PHY chip corresponds to an Ethernet transmission device. Since the main difference of each preferred embodiment lies in the connection relationship between the internal components, for the convenience of description, first introduce the connection relationship between the internal components in each embodiment in conjunction with the drawings, and then introduce this in detail. Invented newly added internal logic units: error correction code encoding/decoding unit and interleaving/de-interleaving unit.
[0029] See figure 1 , Which is a schematic structural diagram of a first embodiment of a physical layer PHY chip disclosed in the present invention. The PHY chip shown in this embodiment mainly includes an error correction code encoding/decoding unit 12, an interleaving/deinterleaving unit 13, a 4b/5b encoding/decoding subunit 11, a random scrambling subunit 14, and a media-related processing subunit, which are sequentially coupled to each other. 15. Among them, the 4b/5b encoding and decoding subunit 11, the random scrambling subunit 14, and the media related processing subunit 15 correspond to the physical layer processing unit in an existing PHY chip. According to the PHY chip level specified by the IEEE international standard, the 4b The /5b coding/decoding subunit 11 and the random scrambling subunit 14 may be located in the PCS layer (Physical Coding Sublayer), and the media-related processing sub-unit 15 may be located in the PMA (Physical Media Attachment) and PMD (Physical Media Dependent) layers.
[0030] The essence of this preferred embodiment is that the error correction code encoding/decoding unit 12 and the interleaving/de-interleaving unit 13 are coupled in the physical layer processing unit of the existing PHY chip. These two newly added units can be located in the PCS layer of the PHY. Above.
[0031] Specifically, in the output direction, the code stream entering the physical layer from the MAC layer is firstly coded and interleaved by the error correction code encoding/decoding unit 12 and the interleaving unit 12, and then passed through the 4b/5b codec Unit 11 and random scrambling code subunit 14 perform corresponding 4b/5b encoding and random scrambling code processing, and finally processed by the media-related processing subunit 15 and sent to the transmission medium (Cat3s twisted pair); in the input direction, perform Corresponding reverse processing, as far as the error correction code encoding/decoding unit 12 and the interleaving/deinterleaving unit 13 are concerned, deinterleaving and error correction code decoding are mainly performed in sequence.
[0032] See figure 2 , Which is a schematic structural diagram of a second embodiment of a physical layer PHY chip disclosed in the present invention. The main difference between this embodiment and the first embodiment is that due to the different specific composition of the physical layer processing unit in the PHY chip, the newly added error correction code encoding/decoding unit 12 and interleaving/deinterleaving unit 13 and other sub-units are added. The connection relationship is different. The PHY chip shown in this embodiment mainly includes an error correction code encoding/decoding unit 12, an interleaving/deinterleaving unit 13, a Manchester encoding/decoding subunit 21, and a media-related processing subunit 15 that are sequentially coupled to each other. Among them, the Manchester encoding/decoding subunit 21 and the media-related processing subunit 15 correspond to the physical layer processing unit in another existing PHY chip, such as a 10M Ethernet PHY chip.
[0033] Based on the above-mentioned preferred embodiments, it can be seen that the essence of the present invention is to add an error correction code encoding/decoding unit and an interleaving unit coupled to the existing physical layer processing unit in the PHY chip. Generally, it can be coupled to the existing physical layer. Outside the layer processing unit, such as serially connected before each subunit of the physical layer processing unit. Of course, it is not excluded that it is directly coupled to the physical layer processing unit, such as being connected in series between the subunits of the existing physical layer processing unit. The specific position of the series connection depends on the specific conditions of the physical layer processing unit. In short, as long as the error correction code encoding/decoding unit and the interleaving unit are coupled to the MAC layer interface. The coupling may be direct coupling, that is, the signal entering the PHY chip from the MAC side interface first enters the error correction code encoding/decoding unit and the interleaving unit, and then enters the physical layer processing unit of the existing PHY chip for processing; the coupling may also refer to Indirect coupling, that is, the signal entering the PHY chip from the MAC side interface first enters the physical layer processing unit of the existing PHY chip for processing, and then enters the error correction code encoding/decoding unit and the interleaving unit for processing. The main differences between the PHY chip of the present invention and the existing PHY chip are detailed below: the newly added error correction code encoding/decoding unit 12 and the interleaving unit 13.
[0034] The error correction code encoding/decoding unit 12 encodes the transmitted digital signal and decodes the corresponding error correction code at the receiving end, so that the system has a certain error correction capability and anti-interference capability (for example, the ringing signal is against the ether Network data interference), which can greatly avoid the occurrence of bit errors in the code stream transmission, thereby reducing the occurrence of image jumps, discontinuities, and mosaics at the receiving end. The essence of error correction code encoding is to increase the reliability of communication. Of course, error correction code encoding will reduce the transmission of useful information data. The process of error correction code encoding is to add some symbols to the source data stream to achieve The purpose of error judgment and error correction at the receiving end is what is often referred to as overhead. Dividing the number of useful bits by the total number of bits equals the coding efficiency, and different coding methods correspond to different coding efficiency.
[0035]Preferably, the error correction code encoding/decoding unit 12 is a forward error correction (FEC) encoding unit. The FEC code encoding/decoding unit specifically includes a Reed-Solomon RS code encoding/decoding subunit and a convolutional code encoding/decoding subunit. The RS code encoding/decoding subunit mainly performs RS code encoding or corresponding decoding on the input signal. , The RS code encoding can be a 16-byte RS code added after 188 effective bytes to form a (204,188) RS code, also known as outer encoding; the convolutional code encoding/decoding subunit is mainly for the input signal Perform convolutional code encoding or corresponding decoding, and the convolutional code encoding is also called inner encoding. The combination of outer coding and inner coding is also called concatenated coding. The code word of the forward error correction code (FEC) is a code type with a certain error correction capability. After corresponding decoding at the receiving end, not only the error can be found, but also the location of the error symbol can be judged, and the error can be corrected automatically. This kind of error correction code information does not need to be stored, does not require feedback, and has good real-time performance. The RS code and convolutional code are described in detail below.
[0036] (1) RS Reed-Solomon code.
[0037] The RS code is an error correction code that can correct multiple errors. The RS code is (204, 188, t=8), where t is the number of bytes that can withstand the length (that is, it can correct 8 bytes of errors), and 188 is the corresponding The valid symbol of, the check segment is 16 bytes (overhead byte segment). In practice, the RS code of (255, 239, t=8) is implemented, and 51 all "0" bytes are added before 204 bytes (including synchronization bytes). After the RS code is generated, the first 51 empty bytes are discarded to form Truncated (204,188) RS code. The coding efficiency of RS is: 188/204.
[0038] (2) Convolutional code
[0039] Convolutional codes are very suitable for correcting random errors. However, the characteristic of the decoding algorithm itself is that if an error occurs during the decoding process, the decoder may cause sudden errors. For this reason, an RS code block is used on the upper part of the convolutional code. The RS code is suitable for detecting and correcting those burst errors generated by the decoder. Therefore, the combination of convolutional code and RS code can compensate each other. Convolutional codes are generally divided into two types:
[0040] (1) Basic convolutional code: The coding efficiency of the basic convolutional code is η=1/2, the coding efficiency is low, and the advantage is strong error correction ability.
[0041] (2) Shrinking convolutional code: If the quality of the transmission channel is good, in order to improve the coding efficiency, the punctured convolutional code can be sampled. The coding efficiency is: η=1/2, 2/3, 3/4, 5/6, 7/8 punctured convolutional codes with coding efficiency.
[0042] In another preferred embodiment, the error correction code encoding/decoding unit 12 is a Turbo code encoder/decoder, and its performance is as good as the traditional cascade of the RS outer code and the convolutional inner code. So Turbo code is an advanced channel coding technology. Since it does not need to be coded twice, its coding efficiency is better than traditional RS+ convolutional codes.
[0043] After the error correction code encoding/decoding unit of the transmitting end PHY chip performs corresponding error correction code encoding on the code stream to be sent, the transmitted Ethernet data has a certain anti-interference ability, even if other signals (such as vibrations) are received during the transmission process. Ring signal) interference, after corresponding decoding by the error correction code encoding/decoding unit of the receiving end PHY chip, the interfered Ethernet data can be corrected, and the occurrence of error codes can be reduced or even prevented.
[0044] Furthermore, in practical applications, bit errors often occur in series. This is because long-duration interference will affect several consecutive bits, and channel coding is only used when detecting and correcting single errors and not too long series of errors. Is the most effective. For example, RS can only correct errors of continuous 8 bytes. If the continuous interference of other signals to Ethernet data is within 8 bytes, it can be solved by adding an RS code encoding/decoding unit inside the PHY chip. However, if the duration of the interference signal is too long and the continuous interference to the Ethernet data exceeds 8 bytes in length, it cannot be solved by only the RS code encoding/decoding unit.
[0045] In order to correct the bit errors and some burst errors that occur in the above series, preferably, the PHY chip also includes an interleaving/deinterleaving unit coupled with the error correction code encoding/decoding unit. Use interleaving technology to disperse these errors, turn a long string of bit errors into short string errors, and then use various error correction code encoding/decoding to correct its errors. For example, the error correction capability of RS (204, 188) is 8 bytes, if the interleaving depth is 12, the correction can resist burst errors with a length of 8×12=96 bytes.
[0046] The convolution method is generally used to realize interleaving and de-interleaving. Interleaving technology rearranges the coded signals according to certain rules. After de-interleaving, burst errors are dispersed in time, making them similar to random errors that occur independently, so that error correction codes can effectively correct errors. The effect of adding cross product can be understood as extending the length of resistance bytes for error correction, such as image 3 The schematic diagram of the interleaving principle shown. The original code sequence is interleaved to form a new sequence with a different arrangement order from the original sequence, and the new sequence formed continues to be transmitted to the receiving end through the transmission medium, assuming that 4 consecutive chips are disturbed during the transmission process, as shown in the figure For the four chips 2, 7, 12, and 17, the receiver needs to perform corresponding de-interleaving processing on the received sequence through the interleaving/de-interleaving unit to restore the original sequence of the original code sequence. It can be seen from the figure that the above-mentioned 4 consecutive scrambled chips after de-interleaving are dispersed to make them similar to random errors that occur independently, and then general error correction code encoding/decoding techniques can be used for error correction. Codes with strong error correction capabilities generally require relatively low interleaving depth. If the error correction ability is weak, a deeper interleaving depth is required.
[0047] If in order to achieve a strong error correction, an error correction code encoding/decoding unit and an interleaving/deinterleaving unit coupled with it are added at the same time inside the PHY chip. Generally speaking, the Ethernet data is firstly coded with error correction codes (such as FEC coding) by an error correction code encoding/decoding unit at the sender, and then interleaved by an interleaving/de-interleaving unit. The processing order at the receiving end is opposite to that of the sending end. First, the interleaving/de-interleaving unit performs de-interleaving processing to complete error dispersion, and then the error correction code encoding/decoding unit implements data error correction. In addition, it can be seen from FIG. 5 that the cross-product does not increase the data symbols of the channel, in other words, it does not affect the data transmission rate.
[0048] Of course, if the interference of other signals on the Ethernet data can be basically eliminated through the processing of the error correction code encoding/decoding unit, then the interleaving/deinterleaving unit may not be provided, which mainly depends on the degree of interference. For example, suppose that the ringing signal cycle of the phone is 25Hz, the ringing signal is a square wave, and the high level duration of 90V is 2us. During this period of time, telephone Zhenling signals can interfere with the transmission of 2us/147.5ns=13.5593 symbols. Generally speaking, each symbol can carry 3 to 4 bits, and 8 bits are one byte. After conversion, it can be known that the telephone ring signal is equivalent to 6 to 9 bytes of Ethernet data that can interfere; If the error correction code encoding/decoding unit inside the PHY is specifically an RS code encoding/decoding unit, the RS code can only correct 8 bytes of errors. By comparison, if the ringing signal continues to interfere with the Ethernet data for less than 8 bytes, it can be basically corrected by the RS code encoding/decoding unit alone; but if the ringing signal continues to interfere with the Ethernet data for more than 8 bytes, then It is better to couple with an interleaving/de-interleaving unit to increase the error correction capability. Assuming that the achieved interleaving is 12, then the error correction capability of 12*8=96 bytes can be completed. It can be seen that by adding error correction and interleaving technology to the existing standard PHY chip, the interference of other signals on the Ethernet data during the transmission process can be basically eliminated, thereby enhancing the anti-interference ability of the entire system.
[0049] Because the error correction code encoding/decoding unit and the interleaving/de-interleaving unit are set in the PHY chip, it is possible to eliminate or reduce the interference of the ringing signal before the voice signal on the Ethernet data during the transmission process. Furthermore, preferably, the telecommunications bureau can use the existing telephone lines that have already entered the house to transmit the Ethernet data and voice signals together. That is, the cables external to the PHY chip in the embodiments of the present invention are telephone lines. In this way, not only It saves cable resources and increases the transmission distance.
[0050] The preferred embodiments and specific examples of the Ethernet transmission device of the present invention are disclosed above, and the main technical features of the present invention and the prior art, the error correction code encoding/decoding unit and the interleaving/deinterleaving unit are introduced in detail. The following continues to disclose an Ethernet signal transmission method of the present invention. The Ethernet signal transmitted by this method has strong anti-interference ability, please refer to Figure 4 The illustrated flow chart of the preferred embodiment of the Ethernet signal transmission method. It should be noted that since the Ethernet signal transmission method of the present invention and the Ethernet transmission device disclosed above are based on the same inventive concept, the two involve some of the same basic concepts. For the sake of brevity, the same concepts that have been introduced are described here. I will not go into details, such as the concept and principle of error correction encoding/decoding, and the concept and principle of interleaving/de-interleaving.
[0051] Step 610: Perform error correction code encoding on the physical layer Ethernet signal that needs to be transmitted through the transmission medium. There are many kinds of error correction code encoding, such as forward error correction code encoding or turbo encoding, etc., and there is no limit to the number of times of error correction code encoding. For example, the forward error correction code encoding can include two encodings, that is, as an inner code. RS coding and convolutional coding as outer coding. The resistant length bytes of different error correction codes are generally different. For example, the resistant length bytes of the RS code are 8 bytes. Preferably, the transmission medium is a pair of differential lines, such as telephone lines. On the transmission medium, not only Ethernet data is transmitted, but also voice signals are transmitted. Of course, the ringing signal is transmitted before the voice signals are transmitted.
[0052] Step 620: Perform interleaving processing on the Ethernet signal encoded by the error correction code. In practical applications, bit errors often occur in series. This is because the long-lasting fading valley will affect several consecutive bits, and channel coding only detects and corrects single errors and not too long error series. Is the most effective. Therefore, in order to correct the bit errors and some burst errors that occur in the above series, it is preferable to use interleaving technology to disperse these errors, so that the long series of bit errors become short series of errors, and then various error correction codes are used for related processing. For its error correction, for example, the error correction capability of RS code (204, 188) is 8 bytes. If the interleaving depth is 12, the error resistance is 8×12=96 bytes burst error.
[0053] Step 630: The Ethernet signal after the interleaving process is transmitted to the opposite end through the medium. It should be noted that the Ethernet signal that has completed the interleaving processing is transmitted to the opposite end through the medium, which is for the existing Ethernet signal transmission without error correction code encoding and interleaving before the transmission, which is relevant to the present invention and the existing Ethernet signal transmission. The same processing part, such as the physical layer processing at the conventional PMA and PMD levels, is omitted. For the relevant content of this part, please refer to the existing standard Ethernet transmission method.
[0054] As for the difference between the present invention and the existing Ethernet transmission method: the sequence of the newly added error correction code and interleaving processing steps with the existing physical layer processing steps is not the essence of the present invention, which is based on specific actual conditions. There can be many different processing methods, such as setting it after the existing 4b/5b coding or Manchester coding step and before random scrambling coding; or directly setting it before 4b/5b coding or Manchester coding.
[0055] Step 640: The opposite terminal sequentially performs corresponding de-interleaving and error correction code decoding on the received signal. After the error correction code encoding and interleaving at the transmitting end, and the corresponding deinterleaving and error correction code decoding processing at the receiving end, the anti-interference ability of Ethernet data transmission is enhanced. For example, when the voice signal and the Ethernet data are collocated and transmitted, even if the phone's ringing signal causes some interference to the Ethernet data, the Ethernet data can be encoded/decoded by error correction codes and interleaved/decoded. Interleaving can reduce or even eliminate the impact.
[0056]The above describes in detail an Ethernet transmission device and an Ethernet signal transmission method provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation of the present invention. The description of the above embodiments is only It is used to help understand the method of the present invention and its core idea; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation and the scope of application. In summary, the present The contents of the description should not be construed as limiting the present invention.
