Clock synchronization device and synchronization method thereof

Abstract

The invention discloses a clock synchronization device, comprising a main phase detector, a oscillator, a basic counter, a loop filter and a digital to analog converter (DAC). The invention adopts the technical proposal that: firstly, the clock signal sent out by the oscillator and the synchronous signal from outside are counted by the basic counter, and then transmitted to the main phase detector; secondly, the reference clock signal and the clock signal sent out by the oscillator is received by the main phase detector, and the phase difference between the two is detected, then a first phase difference signal is generated and sent to the loop filter; thirdly, the first phase difference signal from the main phase detector is received and converted into voltage controlled bit by the loop filter, then transmitted to the digital to analog converter; finally, the digital signal is converted into analog signal by the digital to analog converter, and analog voltage is transmitted to the oscillator; wherein, the clock signal transmitted by the oscillator is regulated by the analog voltage. Meanwhile the utility model discloses a clock synchronization method.

Description

technical field [0001] The invention relates to a clock synchronization technology in wireless communication technology, in particular to a clock synchronization device and a synchronization method thereof. Background technique [0002] The wireless synchronization network is a physical network composed of node clock devices and timing links. Network synchronization refers to the distribution of timing signals to all nodes in the network in order to ensure the normal operation of the wireless communication network. The clock frequency and phase of all nodes in the network are strictly required. controlled within a certain tolerance range. [0003] In the wireless synchronization network, GPS (Global Positioning System) is used to configure the reference clock, and the reference clock unit tracks the PP1S (pulse of second) clock output by the GPS receiver. In the existing synchronization method, the clock output signal is adjusted to With the same frequency as the clock inpu...

AI Technical Summary

Problems solved by technology

If the existing synchronization processing method is used, the output clock of the reference clock unit will be abnormal once or more during the process of synchronous tracking, and even cause the hardware units of relevant nodes in the network to reset, resulting in the failure of soft switching of the communication system in a short time

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