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Mask plate, mask plate layout design method and defect repairing method

A mask and defect detection technology, applied in the field of masks, can solve problems such as inability to repair and inability to locate, so as to reduce the risk of scrapping and ensure the quality of repair

Inactive Publication Date: 2008-06-04
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The invention provides a mask, which adopts a new layout design method, and sets additional graphics within the detection range of the isolated graphics of the mask, so as to solve the defects in the isolated graphics of the existing mask , the problem that cannot be repaired because the defect cannot be located

Method used

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  • Mask plate, mask plate layout design method and defect repairing method
  • Mask plate, mask plate layout design method and defect repairing method
  • Mask plate, mask plate layout design method and defect repairing method

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Embodiment Construction

[0036] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0037] The processing method of the present invention can be widely applied in many applications, and can utilize many suitable materials to make, and below is to illustrate by preferred embodiment, certainly the present invention is not limited to this specific embodiment, this field Common replacements known to those skilled in the art undoubtedly fall within the protection scope of the present invention.

[0038] In order to repair every defect on the mask, it is necessary to realize that the defects appearing at any position on the mask can be accurately located. Existing reticles have geometry that needs to be transferred to the wafer surface during semiconductor fabrication. The geometry is determined by the layout of devices, me...

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PUM

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Abstract

The present invention discloses a mask plate, comprising a flat plate having light transmittance to exposure light, wherein, a printable geometric figure having light shading property to exposure light is formed on the flat plate; the geometric figure comprises at least one isolated figure; the isolated figure is provided with no other geometric figure or only the periodically repeated geometric figure along the X-axis and / or Y-axis direction in defect detection range. The present invention adopts a new layout design method, and is provided with the additional figure which cannot be printed in the detection range of the isolated figure in the geometric figure, so as to ensure that the defects of all positions can be positioned and repaired when defect repair is performed to the mask plate. Adopting the present invention can decrease the rejection rate of mask plates during mask plate manufacture and delay delivery risk.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a mask, a layout design method of the mask and a defect repairing method. Background technique [0002] In the semiconductor manufacturing process, the photolithography process is at the center and is the most important process step in the production of integrated circuits. The fabrication of a semiconductor chip is usually divided into multiple layers, and the fabrication of each layer needs to be patterned to form a specific structure, such as forming a contact hole or a metal connection. The pattern definition of these specific structures is usually achieved by a photolithography process, and photolithography is a process of transferring the designed structure pattern to a wafer by using a photolithography mask. [0003] Before the chip is manufactured, one or more photolithographic masks are designed and manufactured according to the layout of the devices...

Claims

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Application Information

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IPC IPC(8): G03F7/14G03F1/00G06F17/50H01L21/00G03F1/72
Inventor 卢子轩
Owner SEMICON MFG INT (SHANGHAI) CORP
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