Clock synchronization transmission method and device based on Ethernet time division, and its protection method

Abstract

The invention provides a clock synchronization transfer method which is based on a time-division Ethernet, wherein, the method comprises the following steps that: Step S1. a superior node sends an Ethernet frame to a subordinate node according to a transmission period of a main node; Step S2. the subordinate node obtains the transmission period of the main node by receiving the Ethernet frame. The invention has the advantages that the synchronizing information transmission of a time-division Ethernet system is realized and the method of realization is simple; meanwhile, a synchronizing clock synchronous with the main node clock is generated by the node, and the simple and real-time rearrangement protection function is realized.

Description

technical field [0001] The invention belongs to the field of computer communication, relates to time division multiplexing of Ethernet, in particular to clock synchronous transfer of Ethernet time division multiplexing. Background technique [0002] Due to its low cost and ease of use, Ethernet technology is widely used not only in local area networks, but also in metropolitan area networks. [0003] Although Ethernet has the above-mentioned advantages, it is easier to guarantee QoS (Quality of Service) such as delay and jitter for time division multiplexing (Time Division Multiple, TDM) transmission for constant-rate communication services (such as video and audio) that require high real-time performance. of Service) indicator. Therefore, for network planners, the combination of Ethernet and time-division multiplexing is an ideal solution for mixed data services including voice communications. However, time division multiplexing requires high clock synchronization, while ...

AI Technical Summary

Problems solved by technology

[0018] Although this scheme can achieve the purpose of forming a synchronous network, it also has the following three defects: first, the physical layer of each node needs to send and receive synchronous clocks at the same frequency; second, the clock selection and conversion chip design is complicated; third, When the path where the upper-level clock arrives is disconnected, the physical layer of Ethernet will still generate a receiving clock according to the local crystal oscillator, but the clock selection chip cannot judge that the path has been disconnected in time and switch to the backup line clock, requiring software to read the physical layer the internal registers to know

[0020] Although this scheme can achieve the purpose of forming a synchronous network, it has the following two defects at the same time: first, the structure of each node is relatively complicated, and it needs to measure the departure time of the data packet and the arrival time of the data, and perform relevant data calculation at the same time. Moreover, two-way communication with adjacent nodes is required; second, the scheme cannot directly use the existing media access control layer, and requires major changes on the basis of the existing media access control layer

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