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Zig-Zag scanning device and method based on dual-caching

A scanning device and double-buffering technology, applied in the field of digital video codec, can solve the problems of AVS encoder, difference in code table setting mode, difficulty in hardware implementation, etc., achieve strong data adaptability, improve coding efficiency, and ensure stability sexual effect

Active Publication Date: 2010-07-21
INESA ELECTRON
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  • Application Information

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Problems solved by technology

[0003] At present, the CAVLC encoder and CABAC (arithmetic coding) encoder of H.264 / AVC have achieved good results, but the setting method of the code table is quite different from that of AVS, and cannot be directly used for the AVS encoder
Moreover, the CABAC coding complexity is high, and it is not easy to implement in hardware
In the reference code of AVS, there is an algorithm related to type scanning. In Chinese patent (application number: 200510126222.9, publication date: June 13, 2007), a kind of entropy coding method suitable for AVS is proposed, but it is not given. Description of Zig-Zag scanning hardware implementation

Method used

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  • Zig-Zag scanning device and method based on dual-caching

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Embodiment Construction

[0025] The double-buffer-based Zig-Zag scanning device and method of the present invention will be further described in detail below.

[0026] This embodiment designs a Zig-Zag scanning device based on double buffering, which is used to convert the two-dimensional array of 8×8 sub-blocks generated by the discrete cosine transform into a one-dimensional arrangement. The scanning device is as follows: figure 1 As shown, it includes transform and quantization input buffer 10, scan controller 20, first demultiplexer 31, second demultiplexer 32, first output buffer 41, second output buffer 42, first multiplexer 51 and The second multiplexer 52; the quantization transformation data transmitted by the TQ data bus is sent to the scan controller 20 after the transformation and quantization input buffer 10, and the transformation and quantization input buffer 10 and the scan controller 20 are enabled by the enable signal, and the scan control The device 20 transmits the scanning address...

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Abstract

The invention provides a Zig-Zag scanning device and a realization method thereof. The invention is used for converting a two-dimensional array of an 8x8 subblock generated by the DTC into the data with one-dimensional arrangement to output. The scanning device comprises a conversion quantification input cache, a scanning controller, a run length coding multiplexer, an amplitude coding multiplexer, a first output cache, a second output cache, a first multiplexer and a second multiplexer; the method based on the device ensures that the scanning and coding can be conduct synchronously by the dual-cache structure, thereby greatly shortening the scanning and coding time and satisfying the requirements of the real time coding perfectly.

Description

technical field [0001] The invention relates to digital video coding and decoding technology, in particular to a Zig-Zag scanning device based on double buffering and its realization method. Background technique [0002] Video coding is an important link in the process of digital video storage and transmission, which involves many key technologies, such as discrete cosine transform (DCT), quantization, scanning, entropy coding, etc. What the DCT transform produces is a two-dimensional array of 8 × 8, for transmission, it must be converted into a one-dimensional array. Two-dimensional to one-dimensional conversion method or scanning method has two kinds: zig-zag scanning (Zig-Zag) and alternate scanning, among which zig-zag scanning is the most commonly used one. After quantization, most of the non-zero DCT coefficients are concentrated in the upper left corner of the 8×8 two-dimensional matrix, that is, the low-frequency component area. After scanning, these non-zero DCT co...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N7/26H04N7/30H04N7/50H04N19/129H04N19/15H04N19/176
Inventor 滕国伟王贺王国中
Owner INESA ELECTRON