An integrated detector and signal processor (31) for ladar focal plane arrays (30) which internally compensates for variations in detector gain, noise, and aerosol backscatter. The invention (31) is comprised of a detector element (42) for receiving an input signal, a circuit (72) for generating a threshold based on the RMS noise level of the input signal, and a circuit (74) determining when the input signal is above that threshold. The detector element (42) is physically located in the interior of the detector array (30), while the signal processing circuitry (50) is located on the periphery of the array (30). In the preferred embodiment, the signal processor (31) also includes a circuit (56) for sampling the input signal and a circuit (58) storing multiple samples, allowing for multiple returns to be detected. In the preferred embodiment, the signal processor (31) can be operated in two modes: self triggered and externally triggered (range-gate mode). In the self triggered mode, the detector continually monitors and samples the incoming signal until a return is detected (by the thresholding circuit). In the range-gate mode, the detector stops sampling when it receives a signal from an external source. Once the data has been acquired, readout electronics (66) output the stored samples along with the stored "stopped" time code to an external computer (26).