Power regulator circuitry for programmable logic device memory elements

Abstract

Power regulator circuitry for programmable memory elements on programmable logic device integrated circuits is provided. The programmable memory elements may each include a storage element formed from cross-coupled inverters and an address transistor. Address drivers may be used to supply address signals to the address transistors. The power regulator circuitry may include an address power supply circuit that produces a time-varying address power supply voltage to the address drivers and storage element power supply circuits that provide time-varying storage element power supply voltages to the cross-coupled inverters in the storage elements. Unity gain buffers may be used to distribute a reference voltage from a bandgap voltage reference to the power supply circuits. The power supply circuits may use voltage dividers and p-channel metal-oxide-semiconductor control transistors.

Description

technical field [0001] [0001] The present invention relates to power regulator circuits for powering memory cells, and more particularly, to power regulator circuits for powering volatile memory cells in devices such as programmable logic devices. The output voltage is boosted on the integrated circuit. Background technique [0002] [0002] Integrated circuits often contain volatile memory cells. Typical volatile memory cells are based on cross-coupled inverters (latch) and are used to store data. Each memory cell can store one bit of data. [0003] [0003] Volatile memory cells are commonly used to store configuration data into programmable logic devices. A programmable logic device is an integrated circuit that can be relatively customized in small batches to achieve a desired logic design. In a typical scenario, a programmable logic device manufacturer pre-designs and manufactures an off-the-shelf programmable logic device integrated circuit. Later, logic designers emp...

AI Technical Summary

Problems solved by technology

However, powering programmable memory cells with a statically boosted supply voltage can negatively impact performance

For example, it may be difficult to load configuration data into such memory cells

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