Driving element having time schedule controller and driving method thereof
A technology of timing controller and drive unit, applied in instruments, static indicators, etc., can solve the problems of reducing the quality of picture display and the inability of pixels to achieve brightness.
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no. 1 example
[0058] refer to Figure 2A , which shows a circuit block diagram of a liquid crystal display according to an embodiment of the present invention. The liquid crystal display 200 includes: a driving unit 202 , a source driver 204 , a gate driver 206 and a liquid crystal display panel 208 . The driving unit 202 is coupled to the source driver 204 to output the frame data SO(n) to the source driver 204 . The source driver 204 outputs data signals SD1 - SDn according to the frame data SO(n) to drive the LCD panel 208 . The gate driver 206 is also coupled to the driving unit 202 , and the gate driver 206 scans the liquid crystal display panel 208 by outputting scan signals Sc1˜Scm according to a clock signal (not shown) of the driving unit 202 . n and m are integers greater than 1.
[0059] refer to Figure 2B , which shows Figure 2A The detailed circuit diagram of the driving unit 202. The driving unit 202 includes: a buffer 2022 , a timing controller 2021 and a memory 2023 ...
no. 2 example
[0067] refer to Figure 4A and Figure 4B , Figure 4A shows a circuit diagram of a liquid crystal display according to a second embodiment of the present invention, Figure 4B show Figure 4A A detailed circuit diagram of the drive unit 402. The difference between the second embodiment and the first embodiment is that the drive unit 402 of the second embodiment only includes one overdrive data generation unit 40211 .
[0068] refer to Figure 5 , which shows Figure 4AA flow chart of the driving method of the driving unit 402. First, in step 502 , the previous original frame data F(n−1) and the current original frame data F(n) are provided to the buffer 4022 . Next, in step 504, the first previously adjusted frame data F1(n-1) and the second previously adjusted frame data F2 are respectively output according to the previous original frame data F(n-1) and the current original frame data F(n). (n−1) and the first current adjusted frame data F1(n) and the second current ...
no. 3 example
[0072] refer to Figure 6A , 6B ,, 6C and Figure 6D ,in Figure 6A shows a circuit diagram of a liquid crystal display according to a third embodiment of the present invention, Figure 6B show Figure 6A The detailed circuit diagram of the drive unit 602, Figure 6C and Figure 6D Respectively show when the received previous and current original frame data F(n) and F(n-1) fall within the preset range and fall outside the preset range, Figure 6A A schematic diagram of the output frame data SO(n) of the driving unit 602. The driving unit 602 includes a buffer 6022 , a timing controller 6021 and a memory 6023 . The difference between this embodiment and the second embodiment is that the timing controller 6021 in the drive unit 602 disclosed in this embodiment can judge the previous original frame data and the current original frame data F(n-1) and F(n) Whether the relationship of is in a preset range, the preset range is preferably Figure 1B Regions 102 and 104 are sh...
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