Metal interlayer medium contact hole preparation method
A manufacturing method and metal layer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as over-etching, gate etching, and damage to gate conductivity, so as to reduce the etching depth and improve the finished product. rate, improve the effect of gate over-etching phenomenon
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[0014] A preferred embodiment of the method for manufacturing the contact hole of the inter-metal dielectric of the present invention will be described in detail below with reference to the accompanying drawings.
[0015] The manufacturing method of the contact hole of the metal interlayer dielectric of the present invention comprises the following steps:
[0016] Please refer to FIG. 1 , providing a substrate of a semiconductor device, which includes a gate 2 as an emitter and an active area (active area) 1 formed on a semiconductor substrate on both sides of the gate;
[0017] Deposit and form metal interlayer dielectric (ILD) 3 on gate 2 and active region 1, which is used to isolate metal interconnection lines and also to support upper layer metal lines, generally using borophosphosilicate glass (that is, doped with boron and Phosphorous low-temperature silicon dioxide), as an inter-metal dielectric 3;
[0018] The step of depositing barrier layer 4 is different from the p...
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Abstract
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