Non-volatile memory device and design method thereof

Abstract

The invention discloses a non-volatile memory and a design method thereof. The non-volatile memory comprises a multi-layer which provides a source, a drain and a floating gate; the multi-layer comprises multi-layer metal layers which provide interconnection lines for the memory; wherein, at least two metal layers are coupled in a capative way and provide capacitance for the floating gate. The non-volatile memory and the design method thereof provide a solution of non-volatile memory design and manufacture with small cost investment and outstanding memory performance on the basis of the existing logic technology for the users.

Description

technical field [0001] The invention mainly relates to a semiconductor memory, in particular to a nonvolatile memory and a design method thereof. Background technique [0002] Memory can be roughly divided into two categories: volatile and nonvolatile. Volatile memory loses its stored information immediately when the system is turned off; it requires a constant power supply to maintain data. Most RAMs fall into this category. Nonvolatile memory retains data information when the system is turned off or without power supply. [0003] A floating gate non-volatile memory (NVM) device is usually a MOS transistor, the MOS transistor has a source (Source), a drain (Drain) and a gate (Gate), it is the same as the general MOS transistor The difference in structure is that the gate includes two parts: floating gate (Floating Gate) and control gate (Control Gate). The floating gate is located between the gate oxide layer and the inter-electrode oxide layer. The inter-electrode oxid...

AI Technical Summary

Problems solved by technology

However, due to the difficulty of controlling and some unknown effects during the breakdown operation, the programmable times of the non-volatile memory designed by utilizing the soft breakdown and hard breakdown effects will be very limited

Images