Built-in self-repairing system and method for memory

Abstract

The invention provides a memory built-in self-repairing system which comprises a built-in self-testing circuit, a built-in self-diagnostic circuit, a built-in self-repairing circuit and a redundant row / column and is characterized in that: the built-in self-repairing circuit comprises a word repairing circuit provided with a redundant content addressable memory which is specially used for repairing the unit failures of a main memory; the redundant row / column is specially used for repairing the coding failures of the main memory. The invention also provides a corresponding built-in self-repairing method. The built-in self-repairing system and the built-in self-repairing method have the advantages of fining the granularity of redundant resources, increasing the utilization rate of the memory redundant resources, promoting the reliability of the memory after repairing by avoiding failed units with accessing defects, having simple default diagnosis and redundancy allocation algorithm that are easy to realize, making full use of the redundant resources and having better repairing effect.

Description

technical field [0001] The invention relates to the technical field of semiconductor memory, in particular, the invention relates to a memory built-in self-repair system and a self-repair method. Background technique [0002] When repairing semiconductor memory, the industry usually uses external equipment to perform redundancy analysis, and then uses external laser equipment to modify the settings of the memory fuse box to achieve memory repair. However, the use of external devices to perform fault diagnosis and redundant resource analysis on memory brings relatively large overhead. In order to reduce the dependence on external instruments and reduce memory costs, technologies such as Build-In Redundancy Analysis (BIRA) and Build-In Self-Repair (BISR) have been proposed internationally to replace The external device repairs the memory. By using memory built-in self-test (Build-In Self-Test, BIST), built-in redundancy analysis and built-in self-repair technologies, memory ...

AI Technical Summary

Problems solved by technology

Two-dimensional redundancy makes redundant resources more abundant, and the repair efficiency and flexibility are greatly improved, but it also increases the complexity of the redundancy analysis algorithm, because redundant rows and columns are used to cover all faults on the two-dimensional memory It is an NP problem, and its complexity can be reduced by using a greedy strategy to find a better solution. In order to obtain a better repair rate, a two-dimensional redundant allocation algorithm is generally used

When accessing a faulty word, the repair logic matches the faulty address and operates on the data in the redundant resource, but also operates on the corresponding word line and bit line in the main memory, thereby causing an error on the faulty cell. The charge accumulation of the fault word causes the peripheral cells of the fault word to fail, thereby reducing the reliability of the memory

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