Time-after-time programmable memory and manufacturing method thereof

Abstract

The invention disclosed a multi-pass programmable memory and a manufacturing method thereof. The multi-pass programmable memory comprises a tunneling dielectric layer, a floating grid, an inter-grid dielectric layer and a control grid. The tunneling dielectric layer is arranged on a base. The floating grid is arranged on the tunneling dielectric layer. The inter-grid dielectric layer is arranged on the floating grid, wherein, the thickness of the part of inter-grid dielectric layer on the edge of the floating grid is larger than that of the part of inter-grid dielectric layer in the center of the floating grid. The control grid is arranged on the inter-grid dielectric layer. In the multi-pass programmable memory, because the thickness of the part of inter-grid dielectric layer on the edge of the floating grid is larger than that of the part of inter-grid dielectric layer in the center of the floating grid, the drain current is not easy to be formed between the apex angle of the floating grid and the control grid, and the rounded apex angle of the floating grid can prevent the point discharge caused by the concentrated electric field, and can also prevent the drain current of the device, thereby the data confining force is enhanced.

Description

technical field [0001] The invention relates to a semiconductor device, and in particular to a multi-time programmable memory capable of improving data retention and a manufacturing method thereof. Background technique [0002] Multi-Time Programmable Memory (MTP) devices have the advantage that data can be stored, read, and erased multiple times, and the stored data will not disappear after power off. Therefore, it has become a memory device widely used in personal computers and electronic equipment. [0003] In a typical multiple-time programmable memory device, a floating gate (Floating Gate) and a control gate (Control Gate) are generally made of doped polysilicon. The floating gate is located between the control gate and the substrate, and is in a floating state without being connected to any circuit. The control gate is connected to the word line (Word Line). In addition, a tunneling oxide layer (Tunneling Oxide) and an inter-gate dielectric layer (Inter-GateDielect...

AI Technical Summary

Problems solved by technology

When there is a defect in the inter-gate dielectric layer between the control gate and the floating gate, the charge stored in the floating gate enters the control gate through the defect, which easily causes the leakage current of the device

Moreover, the thickness of the inter-gate dielectric layer between the top corner of the floating gate and the control gate is thinner, and it is easier to form a leakage current between the top corner of the floating gate and the control gate, which affects Device reliability

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