Pixel construction, display panel, photovoltaic device and production process thereof
A pixel structure and manufacturing method technology, which is applied in semiconductor/solid-state device manufacturing, optics, circuits, etc., can solve the problems of increasing the conductive layer and reducing the aperture ratio of the pixel structure, so as to achieve the effect of increasing the aperture ratio and reducing the area
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Embodiment 1
[0058] Figure 2A is a top view of a pixel structure according to an embodiment of the present invention. while Figure 2B is Figure 2A A schematic diagram of the three-dimensional structure of the area where the storage capacitor is located (corresponding to the I area) in the pixel structure. Please also refer to Figure 2AAs shown in FIG. 2B , the pixel structure includes a first patterned conductive layer 235 , a second patterned conductive layer 245 and a pixel electrode 275 on the substrate 200 .
[0059] In this embodiment, the material of the substrate 200 includes inorganic transparent materials (such as: glass, quartz, or other suitable materials, or a combination of the above), organic transparent materials (such as: polyolefins, polyols, polyalcohols) , polyesters, rubber, thermoplastic polymers, thermosetting polymers, polyaromatic hydrocarbons, polymethylmethacrylates, polycarbonates, or other suitable materials, or derivatives of the above, or combinations of th...
Embodiment 2
[0074] Figure 3A is a top view of a pixel structure according to another embodiment of the present invention. while Figure 3B is Figure 3A A schematic diagram of the three-dimensional structure of the region where the storage capacitor is located (corresponding to the I' region) in the pixel structure. Figure 3A and the labels and descriptions of FIG. 3B are substantially the same as those of the above-mentioned first embodiment Figure 2A 2B, so the repeated parts will not be described in detail. but please also refer to Figure 3A As shown in FIG. 3B , the pixel structure includes a first patterned conductive layer 235 , a second patterned conductive layer 245 and a pixel electrode 275 on the substrate 200 .
[0075] The first patterned conductive layer 235 includes a scan line 210 , a gate 220 , a common electrode line 230 and a second patterned layer 310 , wherein the scan line 210 is connected to the gate 220 . In more detail, it is an example that the scan line 21...
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