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Method for fabricating metal line of the semiconductor device

A semiconductor and metal wire technology, which is applied to the metal wire in semiconductor devices and its manufacturing field, can solve problems such as increasing contact resistance, reducing the operating speed of semiconductor devices, and semiconductor device failures, and achieves the effect of preventing contact failure.

Inactive Publication Date: 2009-04-29
DONGBU HITEK CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, if the contact hole cannot be completely formed, the metal line is opened to cause semiconductor device failure
Also, the contact resistance will be increased to reduce the operational speed of the semiconductor device

Method used

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  • Method for fabricating metal line of the semiconductor device
  • Method for fabricating metal line of the semiconductor device
  • Method for fabricating metal line of the semiconductor device

Examples

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Embodiment Construction

[0019] Reference will now be made in detail to methods of forming metal lines in semiconductor devices according to embodiments of the present invention, examples of which are illustrated in the example drawings. Wherever possible, the same reference numbers will be used throughout the example drawings to refer to the same or like parts.

[0020] example Figure 2A As shown in , after semiconductor devices such as photodiodes, transistors, capacitors, etc. have been formed on and / or over semiconductor substrate 11 , protective layer 12 is deposited on and / or over semiconductor substrate 11 . A MOS transistor including a gate electrode G, a source S, and a drain D is shown as a semiconductor device. Subsequently, the protective layer 12 is selectively removed by photolithography to form contact holes. After a metal layer (eg, a tungsten layer) has been formed on and / or over protective layer 12 to fill the contact holes, first contact plugs 13 including the metal layer are for...

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PUM

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Abstract

A metal line in a semiconductor device and fabricating method thereof, in which the semiconductor device includes a first contact plug on a substrate, a first insulating interlayer over the substrate including the first contact plug, a first etch stop layer formed over the first insulating interlayer; a trench in the first insulating interlayer and the first etch stopper layer, a metal line in the trench, the metal line including a second contact plug projecting from the trench, wherein the metal line and the trench are formed as a single body, and a second insulating interlayer over the substrate including the metal line and the second contact plug.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2007-0107737 (filed on October 25, 2007) based on 35 U.S.C 119, the entire contents of which are hereby incorporated by reference. technical field [0002] The present invention relates to a method for manufacturing a metal wire in a semiconductor device, and more particularly, to a metal wire in a semiconductor device and a manufacturing method thereof. Although the present invention is suitable for a wide range of applications, it is particularly suitable for preventing contact failure by forming metal lines without forming via-contacts. Background technique [0003] In general, requirements in semiconductor manufacturing technology have focused on achieving a high degree of integration. Therefore, after forming transistors, bitlines, capacitors, etc., a post process for forming multilayer lines in semiconductor devices such as metal lines for electrically connecting the devices together is requi...

Claims

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Application Information

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IPC IPC(8): H01L21/768H01L23/522
CPCH01L21/76885H01L21/76838H01L21/76897H01L21/28
Inventor 李熙培
Owner DONGBU HITEK CO LTD
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