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Clock data recovery circuit and method for operating the same

一种时钟数据恢复、电路的技术，应用在电气元件、数字技术网络、数字存储器信息等方向，能够解决设计方面负担、大面积等问题

Inactive Publication Date: 2009-05-06
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, since the conventional digital filter occupies a very large area, there is a limit when adopting the conventional digital filter in a highly integrated semiconductor memory device
In addition, even if a conventional digital filter is used, it will impose a significant burden on the design of a highly integrated semiconductor memory device

Method used

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  • Clock data recovery circuit and method for operating the same
  • Clock data recovery circuit and method for operating the same
  • Clock data recovery circuit and method for operating the same

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Embodiment Construction

[0044] Hereinafter, a clock data recovery circuit and an operation method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

[0045] FIG. 3 is a block diagram of a semiconductor memory device according to an embodiment of the present invention.

[0046] Referring to FIG. 3 , the semiconductor memory device includes a phase comparator 310 , a digital filter 300 and a driver 400 .

[0047] The phase comparator 310 compares the phase of the reference clock REF and the internal clock FB to output a phase comparison result signal to the digital filter 300 . The digital filter 300 filters the phase comparison result signal received within a predetermined period and outputs a control signal. The driver 400 determines a predetermined period and controls the digital filter 300 in response to a reference clock REF.

[0048] The phase comparator 310 performs the same function as the phase comparator 110 . The phase comp...

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Abstract

A clock data recovery (CDR) circuit occupies a small area required in a high-integration semiconductor device, electronic device and system and is easy in design modification. The CDR circuit includes a digital filter configured to filter phase comparison result signals received during predetermined periods and output control signals, a driver configured to control the digital filter by adjusting the predetermined periods, and an input / output circuit configured to recognize an input and output of data and clock in response to the control signals.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2007-0111492 filed on Nov. 2, 2007, the entire contents of which are hereby incorporated by reference. technical field [0003] The present invention relates to high-speed semiconductor memory devices, and more particularly, to a clock data recovery (CDR) circuit capable of restoring distortion occurring during high-speed signal and data processing within a semiconductor memory device and an operating method thereof. Background technique [0004] In a system having various semiconductor devices, a semiconductor memory device functions as a data storage device. The semiconductor memory device outputs data corresponding to an address received from a data processor such as a central processing unit (CPU), or stores data received from the data processor into a memory unit selected along with the address input by the data. [0005] As the operating spee...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C7/22G11C7/10H03H17/02
CPCH03L7/089G11C7/222H03L7/091G11C7/22H03L7/093G11C11/407G11C11/4076
Inventor 金敬勋姜宗昊金容棋权大汉卞相渊
Owner SK HYNIX INC