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Hardware Structure of High-Speed ​​Multilink Ring Network System

A multi-link and ring network technology, applied in baseband system components, ring network, data exchange through path configuration, etc., can solve the problems of system performance speed and reliability constraints, and achieve easy expansion, high communication efficiency, The effect of high reliability

Inactive Publication Date: 2012-02-22
ZHONGBEI UNIV
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  • Application Information

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Problems solved by technology

[0003] In order to solve the problem that the existing parallel bus data transmission structure in the instrument system is restricted by the system performance (such as speed and reliability) due to the continuous increase in the amount of data to be transmitted, the present invention provides a high-speed Hardware structure of multi-link ring network system

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  • Hardware Structure of High-Speed ​​Multilink Ring Network System
  • Hardware Structure of High-Speed ​​Multilink Ring Network System
  • Hardware Structure of High-Speed ​​Multilink Ring Network System

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Embodiment Construction

[0016] like figure 1 As shown, the hardware structure of the high-speed multi-link ring network system includes a ring network bus with a contact slot structure, and a functional module board inserted into the bus slot of the ring network bus with a functional module circuit. It includes at least one communication link containing high-speed 2×2 analog crossbar switches equal to the number of bus slots, and a control module for controlling the working mode of each switch in the communication link. The switches of the communication link are placed in phases of the ring bus Between adjacent bus slots, the input terminal IN0 of the switch in the communication link is connected to the output terminal OUT0 of the previous switch, the output terminal OUT0 is connected to the input terminal IN0 of the next switch, and the input terminal IN1 of the switch is connected to the previous bus slot The signal output pins of each bus slot are connected, and the output terminal OUT1 is connect...

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Abstract

The invention relates to data transmission in an instrument system, in particular to the hardware structure of a high-speed multi-link ring network system. It solves the problem that the parallel bus data transmission structure in the existing instrument system restricts the performance of the instrument system, including the ring network bus, the function module plug-in board with the function module circuit on the bus slot inserted in the ring network bus, and at least one path containing and The communication links of high-speed 2×2 analog crossbar switches with the same number of bus slots, the control module including programmable gate array FPGA and switch management circuit, the switches of the communication links are placed between the adjacent bus slots of the ring network bus in turn The chip selection end of each switch is connected to the output end of the switch management circuit; the ring network bus includes a status signal bus; the function module board is provided with a low-voltage differential signal transceiver connected to the function module circuit. The invention has the characteristics of simple hardware structure design, high transmission rate, high communication efficiency, high reliability, flexible working mode, easy expansion and saving hardware resources.

Description

technical field [0001] The invention relates to data transmission in an instrument system, in particular to a hardware structure of a high-speed multi-link ring network system capable of reliable and rapid data transmission applied to high-speed instruments. Background technique [0002] A large amount of data needs to be transmitted within the instrument system. Existing instrument systems mainly use parallel bus to achieve communication and data transmission within the system. However, with the increasing amount of data to be transmitted within the instrument system, the parallel bus data transmission structure is facing challenges, which has become a constraint on data transmission speed and reliability. The main bottleneck of system performance. How to transmit data reliably and quickly to make the system run stably and reliably has become a new problem within the instrument system. Contents of the invention [0003] In order to solve the problem that the existing pa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/42H04L25/02
Inventor 甄国涌李圣昆任勇峰张文栋侯卓赵慧芳单彦虎金银姬牛玉源郑永秋
Owner ZHONGBEI UNIV
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