Dynamic configuration circuit with FPGA loading mode

Abstract

The invention discloses a dynamic configuration circuit with a FPGA loading mode, comprising a control circuit. The programmable output port of the dynamic configuration circuit is connected with the FPGA mode configuration pin to be configured; the control circuit is used for providing the control time sequence needed by the mode configuration for the FPGA to be configured. The dynamic configuration circuit provided by the invention has convenient operation and simple circuit structure; when the structure of the dynamic configuration circuit is unchanged, the dynamic configuration circuit can also perform a mutual switching between different loading modes so as to improve the flexibility of the system configuration and ensure the stability of the system.

Description

technical field [0001] The present invention relates to the dynamic configuration technology of FPGA (Field Programmable Gate Array, Field Programmable Gate Array) loading mode, in particular to a dynamic configuration circuit of FPGA loading mode. Background technique [0002] With the development of communication technology, communication equipment is becoming more and more complex, and the degree of integration is getting higher and higher. FPGA (Field Programmable Gate Array, Field Programmable Gate Array) has become an indispensable and important member of the system. FPGA provides users with programmable resources based on gate arrays, and the formation of its internal logic structure is determined by configuration data. FPGA configuration pins can be divided into two categories: dedicated configuration pins and non-dedicated configuration pins. The dedicated configuration pins only work during configuration, and the non-dedicated configuration pins can be used as ordi...

AI Technical Summary

Problems solved by technology

[0009] The above method (1) can solve the application requirements of different loading modes of FPGA to a certain extent, but it is not flexible enough

Because once the resistance is soldered, you must use tools such as a soldering iron to change the loading mode. This is not very convenient even for debugging in the laboratory. If you need to perform similar operations on site, it will be even more difficult, so the flexibility is poor. Inconvenient to change

The above-mentioned (2) method, although the flexibility is improved, but the reliability of the short circuit block is low, which leads to the reduction of the reliability of the whole system.

[0010] To sum up, the prior art fails to solve the problem of switching between FPGA loading modes effectively, flexibly and conveniently, so it is necessary to further develop more effective methods

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