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Multi-BIOS mapping parallel initialization method

An initialization and image technology, applied in the direction of program loading/starting, program control devices, etc., can solve the problems of overall efficiency reduction, failure to improve system performance and efficiency, etc., and achieve the effect of improving efficiency, improving high availability, and broad application prospects

Active Publication Date: 2012-07-04
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Problems solved by technology

[0003] At present, the realization of high-performance computer technology involves the coordination and optimization of multiple functional modules combining software and hardware in the computer architecture, such as processor modules, bridge controller modules, storage modules, chipset modules, and BIOS modules. In a high-performance computer module, because only one BIOS image is responsible for starting the system and initializing and managing all processors, the overall efficiency of the system is reduced during the system startup phase. Although there are dual BIOS images on the market, this design Only focusing on the protection of the BIOS image does not improve the performance and efficiency of the system, or only one of the BIOS images is responsible for system initialization and management, and the other BIOS image is only a data backup for the normal working BIOS, so there is an urgent need for a A kind of solution that can change this bottleneck that affects computer system performance, the present invention is invented and designed just for this

Method used

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Embodiment

[0039] The method of the present invention mainly comprises: multiple BIOS images (1), parallel initialization system (2), directly connected processor (3), therefore specifically describe the realization of the appeal method with the system structure of a high-performance computer, this high-performance computer Mainly include: BIOS module (A), processor module (B), memory module (C), bridge controller or adapter module (D), peripheral device (I / O) module (E) and storage module (F ).

[0040] Therefore, the architecture of this system is: image 3 The BIOS image is directly connected to the processor module through the SPI (or LPC) bus or other communication protocols, or it can be connected through an adapter chip between the processor module and the BIOS image. The processor module integrates a memory controller, The processor module is connected to the bridge controller or the adapter through the point-to-point communication protocol or the system bus, and the multi-level...

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Abstract

The invention provides a multi-BIOS mapping parallel initialization method. The method is different from a traditional single-BIOS serial initialization method. The method designs a traditional computer system to an initialization computer system with that multi-BIOS is directly connected with a processor for parallelism through a method that a single-BIOS is carried on a multi-level bridge controller for initializing system in a parallel mode on the basis of creatively altering traditional computer system structure. The multi-BIOS mapping parallel initialization method realizes direct connection of the multi-BIOS with the processor, fastens the speed of system initialization, and enhances running efficiency of the system and high availability of the system.

Description

technical field [0001] The invention relates to the field of high-performance computers, in particular to a method for initializing computer systems in parallel with multiple BIOS images and a high-performance computer system architecture realized based on the method. Background technique [0002] High-performance and fault-tolerant computer technology is based on meeting people's demands for higher computing performance and stability of computers. Since the birth of computers, people have been persistently pursuing high-performance computer systems with higher computing power and more stable operation. New and higher demands are put forward. In the process of the development of high-performance computer science and technology, countless predecessors and wise men have contributed their insights to promote the progress of high-performance computer technology. Especially in recent years, various optimized computer architectures have been continuously introduced. Such as MPP,...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/445
Inventor 胡雷钧黄家明王鑫王英明乔英良班华堂
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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