Lithography layout and method for measuring lithography deformation thereof

A layout and photolithography technology, applied in the field of semiconductor integrated circuit manufacturing equipment, can solve the problems of easy misjudgment, large dicing line layout area, and loss of function of rotation marks, and achieve the effect of improving deformation accuracy
CN101750899BActive Publication Date: 2011-06-22SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Patent Information

Authority / Receiving Office
CN ยท China
Patent Type
Patents(China)
Current Assignee / Owner
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Publication Date
2011-06-22

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Abstract

The invention discloses a lithography layout, comprising an exposure unit, wherein four edges of the exposure unit are provided with a cutting street respectively; each cutting street is arranged in windmill shape; and the tail end of each cutting street is provided with a rotation mark which is aligned to the center of the exposure unit. The four rotation marks can be divided to two types, one is frame shape, and the other is rectangular shape. Two different rotation marks are arranged at the tail ends of the cutting streets, and can be measured through a machine aligning precision measurement in the current technical process without adding new machines. The lithography layout determines the deformation condition of first lithography through measuring two rotating marks so as to improve the deformation precision of the first lithography. The length and width of the cutting street are only half of the length and width of the cutting street in the prior art, so that the proportion of the dimension of the cutting street on a silicon wafer can be greatly shortened. The invention also discloses a method for measuring lithography deformation by adopting the lithography layout.
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Description

technical field

[0001] The invention relates to a manufacturing device of a semiconductor integrated circuit, in particular to a photolithographic layout, and also relates to a method for measuring photolithographic deformation by using the photolithographic layout. Background technique

[0002] In the current manufacturing process of integrated semiconductors, during the first-layer photolithography process, the rotation mark is used to monitor the quality of the first photolithography, and the deformation of the first photolithography is judged according to the rotation mark.

[0003] In a common photolithography layout, two scribe lines (ScribeLine) are arranged around the exposure unit (shot) 1 , one is a linear scribe line 3 and the other is a C-shaped scribe line 2 . The two cutting lines form a ring. Wherein the two ends of the C-shaped cutting line are respectively provided with rotation marks X and Y. The rotation marks X and the rotation marks Y are linearly arra...

Claims

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