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Heat dissipation type semiconductor package structure and its manufacturing method

A packaging structure and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems that affect product reliability, delamination, and poor appearance of finished products

Inactive Publication Date: 2012-02-08
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, there are several disadvantages in the manufacture of this kind of semiconductor package 1
Firstly, the coefficient of thermal expansion (Coefficient of Thermal Expansion, CTE) of the heat sink 11 and the blackened layer is different from that of the encapsulant 12, which will cause stress between the heat sink 11, the blackened layer and the encapsulant 12; In addition, since the adhesiveness between the heat sink and the blackened layer is smaller than the adhesiveness between the blackened layer and the encapsulant, the stress generated due to the difference in thermal expansion coefficient will be released at the less adhesive place, and then cause the heat sink 11 to delaminate from the blackened layer
[0008] In other words, since the coefficient of thermal expansion of the heat sink 11 and the blackened layer is different from that of the encapsulant 12, and the adhesion between the heat sink 11 and the blackened layer is smaller than that between the blackened layer and the package Adhesion between the colloids 12, when the thermal energy generated by the chip 10 during operation causes the thermal expansion of the package 1, the stress generated between the heat sink 11, the blackened layer and the encapsulation colloid 12 due to the difference in expansion coefficient It will be released between the less adhesive heat sink and the blackened layer, causing the heat sink 11 to delaminate from the blackened layer. In addition to affecting the heat dissipation efficiency of the heat sink 11, it will also cause the appearance of the finished product to be damaged. Bad, seriously affect the reliability of the product

Method used

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  • Heat dissipation type semiconductor package structure and its manufacturing method
  • Heat dissipation type semiconductor package structure and its manufacturing method
  • Heat dissipation type semiconductor package structure and its manufacturing method

Examples

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Effect test

no. 1 example

[0044] see Figure 2A to Figure 2D , is a schematic cross-sectional view of the first embodiment of the manufacturing method of the heat-dissipating semiconductor package structure of the present invention.

[0045] Such as Figure 2A As shown, a chip carrier 21 such as a substrate is provided, so as to mount and electrically connect at least one semiconductor chip 22 on the chip carrier 21 .

[0046] Besides the illustrated substrate, the chip carrier 21 can also be a lead frame. The semiconductor chip 22 can be electrically connected to the chip carrier 21 by wire bonding as shown in the figure, or can be electrically connected to the chip carrier 21 by flip-chip.

[0047] Such as Figure 2B to Figure 2C As shown, a heat sink 23 with a first surface 231 and a second surface 232 is provided, and the heat sink 23 also includes a flat portion 233 and a support portion 234 extending downward from the flat portion 233, the first heat sink 23 The two surfaces 232 are blackened...

no. 2 example

[0054] see also image 3 , is a schematic diagram of the second embodiment of the heat-dissipating semiconductor package structure and its manufacturing method of the present invention, wherein for the sake of simplification of the drawings and ease of understanding, elements corresponding to the same or similar elements as those in the preceding embodiments are denoted by the same numbers.

[0055] The structure of the heat dissipation semiconductor package of this embodiment is substantially the same as that of the previous embodiment, the main difference is that the heat dissipation element 23 also includes a plurality of through holes 235 for penetrating through the first surface 231 and the second surface 232 of the heat dissipation element 23, and When coating the protective layer 25 , it is necessary to avoid the through hole 235 of the heat sink 23 , and the encapsulant 26 flows into the through hole 235 and hardens and fixes, so as to disperse the stress on the heat si...

no. 3 example

[0057] see also Figure 4A to Figure 4E , is a schematic bottom view of the heat dissipation element of the third embodiment of the heat dissipation semiconductor package structure and its manufacturing method of the present invention, wherein for the sake of simplification of the drawings and ease of understanding, the elements corresponding to the same or similar elements as those in the previous embodiment are denoted by the same numbers.

[0058] The structure of the heat dissipation semiconductor package of this embodiment is substantially the same as that of the preceding embodiments, the main difference is that the protective layer 25 is formed in an opening 251 for exposing part of the blackened layer 24, that is, the protective layer 25 is formed on the opening 251. Around the flat portion 233 of the heat sink 23 , the shape of the opening 251 can be a circle, a square, a rhombus, and the like.

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PUM

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Abstract

The present invention relates to a radiating semiconductor sealing structure and a making method thereof. Mainly, a semiconductor chip is jointed and electrically connected to a chip bearing part, and a radiating part with a blackening layer through a blackening processing is provided; a protective layer is formed on the blackening layer; then, a sealing colloid is formed on the chip bearing part, and is used for coating the semiconductor chip, the protective layer and the radiating part to enable the protective layer to be arranged between the blackening layer and the sealing colloid as a buffer layer between the blackening layer and the sealing colloid; and further, a problem that the radiating part and the blackening layer are delaminated because of stress applied to the radiating part and the blackening layer.

Description

technical field [0001] The invention relates to a semiconductor packaging structure and a manufacturing method thereof, in particular to a heat dissipation semiconductor packaging structure and a manufacturing method thereof. Background technique [0002] Ball Grid Array (BGA) is an advanced semiconductor chip packaging technology, which is characterized in that a substrate is used to place the semiconductor chip, and a plurality of solder balls arranged in a grid array are implanted on the back of the substrate ( Solder Ball), so that more input / output connection terminals (I / O Connection) can be accommodated on the semiconductor chip carrier of the same unit area to meet the needs of highly integrated semiconductor chips, so that the entire semiconductor chip can be connected through these solder balls The packaging unit is soldered and electrically connected to an external printed circuit board. [0003] However, when a highly integrated semiconductor chip is in operatio...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L23/36
CPCH01L2924/0002H01L2224/48091H01L2224/16225
Inventor 洪敏顺蔡和易黄建屏
Owner SILICONWARE PRECISION IND CO LTD