Supercharge Your Innovation With Domain-Expert AI Agents!

Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing

A non-volatile storage, non-volatile technology used in programming to solve problems such as increasing total time

Active Publication Date: 2010-08-04
SANDISK TECH LLC
View PDF15 Cites 11 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This may increase the overall time required to program these memory cells

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
  • Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
  • Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0042] One example of a flash memory system suitable for implementing embodiments of the present disclosure uses a NAND structure that includes multiple transistors arranged in series between two select gates. Transistors and select gates connected in series are called NAND strings. Figure 6 is a top view showing one NAND string. Figure 7 is its equivalent circuit. The NAND string depicted in FIGS. 5 and 6 includes four transistors 100 , 102 , 104 , and 106 connected in series and sandwiched between a select gate 120 and a second select gate 122 . Select gate 120 connects the NAND string to bit line contact 126 . Select gate 122 connects the NAND string to source line contact 128 . Select gate 120 is controlled by applying an appropriate voltage to control gate 120CG. Select gate 122 is controlled by applying an appropriate voltage to control gate 122CG. Each transistor 100, 102, 104, and 106 has a control gate and a floating gate. The transistor 100 has a control gate...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Coarse / fine programming of non-volatile memory is provided in which memory cells are programmed at a first rate of programming prior to reaching a coarse verify level for their intended state and a second rate of programming after reaching the coarse verify level but before reaching the final verify level for their intended state. Large sub-threshold swing factors associated with smaller memory cells can affect the accuracy of sense operations, particularly when sensing at a fine verify level after sensing at a coarse verify level without pre-charging the bit line between the different sensing. Different reference potentials are utilized when sensing at a coarse verify level and a final verify level. The different between the reference potentials can compensate for any discharge of the bit line during the coarse level sensing.

Description

technical field [0001] The present invention relates to programming in non-volatile memory. Background technique [0002] Semiconductor memory devices have become more widely used in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices, and other devices. Electrically Erasable Programmable Read Only Memory (EEPROM) and Electrically Programmable Read Only Memory (EPROM), including flash EEPROM, are among the most popular nonvolatile semiconductor memories. [0003] EEPROM and EPROM memories utilize a floating gate located over and insulated from a channel region in a semiconductor substrate. The floating gate is located between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage of the transistor is controlled by the amount of charge held on the float...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/34G11C11/56
CPCG11C11/5621G11C16/3454G11C16/3459
Inventor 李世俊
Owner SANDISK TECH LLC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com