Power MOS (Metal Oxide Semiconductor) device with groove and manufacturing method thereof
A technology of MOS devices and trenches, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as sudden collapse, reduce aspect ratio, expand process window, and increase trench side wall area Effect
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[0028] The present invention will be further described below in conjunction with specific drawings and embodiments.
[0029] Such as Figure 2 to Figure 10 As shown: taking an N-type MOS device as an example, the present invention includes a cell area A, a gate electrode lead terminal area B, a voltage division protection area C, a cut-off protection area D, an N+ substrate 1, an N-type epitaxial layer 2, and a cell Trench 3, insulating oxide layer 4, conductive polysilicon 5, P well layer 6, N+ injection layer 7, first dielectric layer 8, second dielectric layer 9, first ohmic contact hole 10, source metal 11, second metal layer 12 , voltage dividing trench 13 , stop trench 14 , second ohmic contact hole 15 , third ohmic contact hole 16 , gate metal 17 and third metal 18 .
[0030] Such as figure 2 Shown is a top view of the MOS device of the present invention. Such as figure 2 As shown: the central area of the semiconductor substrate is provided with a cell area A, a...
PUM
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