Image processing system and sampling phase correction method of memory device

Abstract

The invention relates to an image processing system and a sampling phase correction method of a memory device. The image processing system comprises a memory device, a memory device controller and a processor, wherein in a sampling phase correction period, the memory device controller provides fixed quantities of sampling phases, transmits specific test data to a data line, respectively samples the specific test data according to the sampling phases and corrects rising edges of time pulse signals according to an optimal sampling phase; and the processor detects the sampled specific test data in the sampling phase correction period to acquire and define a minimum sampling phase and a maximum sampling phase for correctly sampling the specific test data and determines the optimal sampling phase according to the minimum sampling phase and the maximum sampling phase, wherein the minimum sampling phase and the maximum sampling phase define an effective sampling zone and the optimal sampling phase is positioned in the front half part of the effective sampling zone.

Description

technical field [0001] The present invention relates to a method for correcting optimal sampling phase of a memory device, in particular to a method for correcting optimal sampling phase of a synchronous dynamic random access memory device. Background technique [0002] When accessing a memory device, some control signals are generally required to control the correctness of data access. These control signals may include, for example, address signals used to indicate data storage location information, and time references used as sampling data Based on the clock signal, etc. Taking a single data rate (SDR) memory device as an example, data is usually sampled at a rising edge of a clock. For a double data rate (DDR) memory device, data can be sampled at both rising and falling edges of the clock, thereby increasing the data transmission rate. [0003] figure 1 It is a timing diagram showing the data DATA on the data line and the clock signal CLOCK. As shown in the figure, s...

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Problems solved by technology

The memory device is used to store multiple image data

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