[0021] figure 1 A block diagram of an apparatus for digitizing an analog electric signal Sa is shown. The device has multiple (here, three) sub-channels SK1, SK2, and SK3 connected in parallel, and the signal Sa is applied to it at the same time. Then, before sending the signal to the input terminals of the AD converters ADC1, ADC2, and ADC3, the signal Sa is amplified in each of the sub-channels SK1, SK2, and SK3 (signal amplifying parts A1, A2, A3). The output values of the AD converters ADC1, ADC2, and ADC3 then enter a common digital signal processor DSV, which receives the value (receiver UE) and forms and outputs a total digital value Sd from it.
[0022] The AD converters ADC1, ADC2, and ADC3 are the same in the embodiment here (but different AD converters can also be used in each subchannel SK1, SK2, and SK3).
[0023] The amplitude of the signal Sa is within the total amplitude range (total dynamic range) D, which is 24 Bit. When the resolution of the AD converter ADC is 16Bit, the precision required by the device is 12Bit. By adjusting the signal amplifying parts A1, A2, A3 and selecting the AD converters ADC1, ADC2, ADC3 in this way, the signal Sa that fully utilizes the amplitude range of 24 Bit fully controls the AD converter ADC1. (The signal amplifying part A1 may be 1, for example, or the signal amplifying part A1 can be removed in this case). The signal amplification part A2 of the subchannel SK2 is larger than the signal amplification part A1 by a factor of 2 4. Correspondingly, the AD converter ADC2 is completely controlled when the signal Sa is large, and the AD converter ADC1 also indicates the signal Sa. If the signal Sa is so small that the number of Bits less than 12 Bit is used by the AD converter ADC1, the AD converter ADC2 (subchannel SK2) will work. The input signal is amplified by a factor of 2 4 The signal Sa, which is equivalent to a 4Bit offset between the AD converter ADC1 and ADC2. If the signal Sa is so small that the AD converter ADC2 also uses a Bit number less than 12 Bit, then the AD converter ADC3 (subchannel SK3) will work. Its signal amplification part A3 reaches 2 8 This corresponds to the offset between the AD converter ADC2 and ADC3 being 4Bit (and correspondingly the offset between the AD converter ADC1 and ADC3 is 8Bit).
[0024] figure 2 It briefly shows the amplitude range AB1, AB2, AB3 relative to the total amplitude range D of the device. The bit number of amplitude range AB1, AB2, AB3 is in figure 2 In is represented as small box B. Each amplitude range AB1, AB2, AB3 corresponds to the above-mentioned having exactly 16 small boxes B. Each amplitude range AB1, AB2, AB3 is smaller than the total amplitude range D, and the amplitude ranges AB1, AB2, AB3 overlap each other, and each amplitude range AB1, AB2, AB3 is moved by 4Bit compared to the directly adjacent amplitude range AB2 or AB3. . The amplitude ranges AB1, AB2, and AB3 of the sub-channels SK1, SK2, and SK3 also form a gradation within the total amplitude range D, and their displacement V (degradation) is 4Bit respectively. In this way, three AD converters ADC1, ADC2, and ADC3 are used to ensure that the accuracy of the device (system accuracy) is 12 Bit.
[0025] The signal processor DSV determines which of the three AD converters ADC1, ADC2, and ADC3 output digital values (characters) are received, so that they can be output in a 24Bit specification in consideration of their respective displacement V.
[0026] in image 3 The schematic diagram in shows a modified device that also has three sub-channels SK1, SK2, and SK3. As in figure 1 In the same way, the signal Sa is sent to the three parallel sub-channels SK1, SK2, SK3, and the output value of the channel is sent to a common digital signal processor DSV, which is used to transfer the three sub-channels SK1, SK2, SK3 The numeric values of are merged together.
[0027] in image 3 In the device shown, however, the analog signal amplifying parts A1, A2, and A3 are returned after the AD converters ADC1, ADC2, and ADC3 and before being combined in the signal processor DSV, so that the output of each sub-channel SK1, SK2, SK3 There are digital values again, but the digital values here have the same weight. Because the analog signal amplifying part A1, A2, A3 is a power of 2 (2 4 Or 2 8 ), so they can be compensated by bit shifting BS1 and BS2 of 4Bit after AD converter ADC1, ADC2, ADC3.
[0028] In practice, the analog signal amplification parts A1, A2, A3 and the power of 2 are always approximately different. For this reason, digital multipliers M1, M2, M3 are provided after Bit shifting BS1 or BS2, which adjust or correct each sub-channel SK1, SK2, SK3 through parameters "adjustment" Ad1, Ad2, Ad3 (correction coefficients) Zoom in. A sub-channel, here is the most sensitive sub-channel SK3, of course the correction value KD is obtained through (pre-)adjustment (such as factory adjustment). Therefore the subchannel SK3 forms a reference channel for the other two subchannels SK1 and SK2. Device according to image 3 It also has a corrector starting from the reference channel, here from the sub-channel SK3. Here the parameter Ad3 only corrects the signal amplifying part A3.
[0029] Such as image 3 It is further shown that the AD converters ADC1, ADC2, ADC3 output the same value-in their respective resolution categories (resolution accuracy, measurement accuracy)-if the signal Sa is in the amplitude range AB1 and AB2 or AB2 and AB3 In these ranges, the amplitude ranges overlap each other. Therefore, the two sub-channels SK2 and SK3 output the signal value Sa1 in the scope of their resolution (see figure 2 ), and compare the two digital values with each other through the comparator Calc2. If the result of the subchannel SK2 is different from the result of the subchannel SK3, the comparator Calc2 adjusts the parameter Ad2 accordingly; in this way, the subchannel SK2 is supplementally adjusted. For the correspondingly larger signal Sa, the subchannel SK1 is similarly adjusted via Calc1. In the resolution category, the correction of the sub-channels SK1 and SK2 prevents the three sub-channels SK1, SK2, and SK3 from drifting apart from each other. This starts from the reference sub-channel SK3 and successively passes through the directly adjacent sub-channel SK1 in amplitude. Go with SK2.
[0030] Figure 4 It schematically shows the reception of the digital value of the sub-channels SK1, SK2, SK3 by the digital signal processor DSA, wherein a separate symbol bit VB (so-called symbol specification) is used to represent the value of the digital value. Each AD converter ADC1, ADC2, ADC3 has a resolution of 16Bit, which respectively passes Figure 4 It is represented by 16 small boxes B. The arrow F indicates the correction direction, and the longitudinal frame AmM schematically shows the adjustment (adjustment range) by means of the multipliers M1, M2, M3. The arrow should briefly indicate the receiver UE by means of a digital signal processor DSV (UEmDSV). Each digital value receiver UE (combined) becomes a unique total digital value A (24Bit), which can be Figure 4 It is easier to understand that taking into account the mutual 4Bit displacement V of the amplitude ranges AB1, AB2, AB3, the digital values are shown overlapping up and down in the figure.
[0031] Under ideal circumstances, the digital value can even simply go from top to bottom, received by the digital signal processor DSV and output when needed.
[0032] Of course, the digital signal processor DSV must decide (recognize) whether an AD converter ADC1 or ADC2 or ADC3 is overmodulated, and which of the two effective digital values should be received according to different accuracy.
[0033] If you first assume a smaller signal, in which the AD converter ADC3 has not been over-modulated, so the digital signal processor DSV can receive all the following Bits in the total digital value A. At the same time, each digital value can be used to calculate the deviation of the "rated value" of the AD converter ADC1 and ACD2 and the AD converter ADC3 (for example, through the formation of a quotient). Therefore the parameters Ad1 and Ad2 can be provided for the multipliers M1 and M2. The change of the parameters Ad1 and Ad2 forces the subchannels SK1 and SK2 to also indicate the digital value. If the AD converter AD3 is over-modulated, the final correction values AD1 and AD2 are always maintained, and the sub-channel SK2 is temporarily the "reference" for the sub-channel SK1. The digital value of the AD converter ADC3 is completely ignored in this case, and instead the digital value of the AD converter ADC2 is received and provided to the total digital value A in the result. Only the lowest Bits in the digital value that the AD converter ADC3 may provide are below the accuracy required by the device and can be optionally set to 0 (or alternatively to 1). The sub-channel SK1 is corrected (tracked) based on the digital value of the AD converter ADC2 in this case. If the signal Sa is still large, so that the AD converter ADC2 is overmodulated, then the entire digital value from the sub-channel SK1 is received in the result.
[0034] If the signal Sa is smaller again, this can be passed through higher bits ( Figure 4 The return to zero of Bits in the upper left of the center is easily detected, and then the digital signal processor DSV first turns on the more sensitive sub-channel SK2 or SK3. No longer use the multipliers M1, M2, M3 for correction; keep the last valid correction value.
[0035] When the signal Sa is in the form of a DC voltage, etc., due to drift, the relatively less sensitive subchannel SK1 (and SK2) must be used as the master for the more sensitive subchannel SK2 when returning to the more sensitive subchannels SK2 and SK3. And the adjustment of SK3 multiplier. This is especially true when they are activated for a long time.
[0036] If the signal Sa is an alternating signal (for example an alternating voltage), then at the latest 10 milliseconds later at 50 Hz (after one and a half waves,-this passes Figure 4 The change in the sign bit VB), the relatively less sensitive sub-channels SK1 and SK2 are returned to the (most sensitive) reference channel (sub-channel SK3), so that the sub-channels SK1, SK2, and SK3 are mutually Permanently adjust between. The prerequisite for this pure multiplication adjustment of each sub-channel SK1, SK2, SK3 is offset-degree of freedom, but this can be relatively easy to use a digital high-pass filter before the respective multipliers M1, M2, M3 achieve.
