Device and method for data interception and time sequence drifting detection of interface of synchronous dynamic random access memory

Abstract

The invention discloses a device and a method for the data interception and the time sequence drifting detection of an interface of a synchronous dynamic random access memory. The device comprises a differential signal to single-ended signal converting circuit, a first phase delay circuit and a data interception circuit, wherein the differential signal to single-ended signal converting circuit isconnected to a synchronous transmission interface to receive a differential data interception signal transmitted by the synchronous transmission interface and convert the differential data interception signal into a single-ended data interception signal; the first phase delay circuit is connected to the differential signal to single-ended signal converting circuit and regulates the phase of the single-ended data interception signal to generate a single-ended data interception signal subjected to phase delay; and the data interception circuit is connected to the first phase delay circuit to intercept synchronous data transmitted by the synchronous transmission interface according to the single-ended data interception signal subjected to the phase delay.

Description

technical field [0001] The invention relates to the technical field of memory access, in particular to a device and method for data interception and timing drift detection applied to a synchronous dynamic random access memory interface. Background technique [0002] With the rapid development of computer systems, microcomputer systems, consumer electronics and semiconductor technology, the audio-visual performance of electronic products has developed significantly, so the communication interface for source data synchronization has also made great progress, such as DDR, DDR2 and DDR3. The access speed of synchronous dynamic random access memory (SDRAM) is rapidly increasing, and it also provides higher memory bandwidth. The access speed of synchronous dynamic random access memory (SDRAM) has improved from several million hertz (xMHz) to today's billions of hertz (xGHz), so more sophisticated mechanisms, methods and circuits are needed to ensure The correctness of data readin...

AI Technical Summary

Problems solved by technology

Therefore, it is not safe to use this method to generate effective data interception signals to intercept data, and it is easy to generate timing errors. At the same time, the execution frequency of the entire system will be affected by the signal routing of the output drive circuit and the circuit board. Limited by the time delay generated, it is impossible to use the current and future high-speed synchronous data transmission interface

Therefore the method for the data interception of existing synchronous dynamic random access memory interface still has many deficiencies and needs to be improved

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