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Integrated circuit, fin field effect transistor (finfet) and fabrication method thereof

A fin field effect and integrated circuit technology, applied in transistors, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as increased leakage current and reduced performance

Active Publication Date: 2013-10-02
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For example, metal-oxide-semiconductor field-effect transistors (MOSFETs) experience reduced performance due to shrinking channel lengths, including increased leakage currents

Method used

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  • Integrated circuit, fin field effect transistor (finfet) and fabrication method thereof
  • Integrated circuit, fin field effect transistor (finfet) and fabrication method thereof
  • Integrated circuit, fin field effect transistor (finfet) and fabrication method thereof

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Embodiment Construction

[0025] Methods of making and using various embodiments of the invention are discussed in detail below. It should be noted, however, that the present invention provides many possible inventive concepts that can be implemented in various specific scopes. These specific examples are only used to illustrate the method of making and using the present invention, but not to limit the scope of the present invention.

[0026] Some planar metal oxide semiconductor field effect transistors using materials other than silicon have advantages over traditional silicon planar MOS devices (Si planar MOS devices), such as germanium planar MOS devices (Ge planar MOS devices) ), its carrier (electron / hole) mobility is about 2.64 times higher than that of silicon. It has been found that germanium planar MOS devices face the following problems: (1) lower energy gap spacing E g and high subcritical leakage current I sub (subthreshold leakage current), (2) high dielectric constant ε and short chan...

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Abstract

This description relates to a fin field-effect-transistor (FinFET) including a substrate and a fin structure on the substrate. The fin structure includes a channel between a source and a drain, wherein the source, the drain, and the channel have a first type dopant, and the channel comprises at least one of a Ge, SiGe, or III-V semiconductor. The FinFET further includes a gate dielectric layer over the channel and a gate over the gate dielectric layer. The FinFET further includes a nitride spacer on the substrate adjacent the gate and an oxide layer between the nitride spacer and the gate and between the nitride spacer and the substrate.

Description

technical field [0001] The present invention relates to a semiconductor device, in particular to an accumulation type fin field effect transistor. Background technique [0002] As the size of integrated circuits shrinks, it is necessary to overcome the problems faced by the size reduction. For example, metal-oxide-semiconductor field-effect transistors (MOSFETs) experience reduced performance, including increased leakage current, due to reduced channel lengths. Therefore, the industry needs novel methods and structures to improve the performance of MOSFETs. Contents of the invention [0003] In order to solve the problems of the prior art, the present invention provides a fin field effect transistor, comprising: a substrate; a fin structure located on the substrate, the fin structure includes a channel located at a source and Between a drain, wherein the source, the drain and the channel have a first type doping, and the channel includes at least one of germanium, silico...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/36H01L21/8232H01L21/336H01L27/088
CPCH01L29/7851H01L29/66795H01L29/7848H01L21/823431H01L29/165H01L29/267H01L2029/7857H01L27/0886H01L29/785
Inventor 叶致锴张智胜万幸仁
Owner TAIWAN SEMICON MFG CO LTD