Static random access memory

Abstract

The invention relates to a static random access memory which comprises a latch circuit, a first switch circuit, a second switch circuit, a third switch circuit and a sensing amplifier, wherein the latch circuit is provided with a first access end and a second access end; the first switch circuit is provided with a first bit transmitting end which is coupled to the first access end and a second bit transmitting end; the second switch circuit is provided with a third bit transmitting end which is coupled to the second access end and a fourth bit transmitting end which is coupled to the second bit transmitting end; the third switch circuit is provided with a fifth bit transmitting end which is coupled to the fourth bit transmitting end and a sixth bit transmitting end which is coupled to a bit line; the sensing amplifier is coupled to the bit line and used for judging a bit value transferred by the bit line; and in a data writing mode, the first switch circuit and the second switch circuit are not conducted simultaneously.

Description

technical field [0001] The present invention relates to a static random access memory, especially a high-density and high-speed static random access memory which has a wide operating voltage range and can be operated at low voltage. Background technique [0002] Please refer to figure 1 . figure 1 Shown is a schematic diagram of a conventional SRAM cell (Static Random Access Memory Cell) 10 . The SRAM includes a SRAM unit 10 and a sense amplifier (Sehse Amplifier, not shown in the first figure). A traditional SRAM unit has six field-effect transistors, namely the so-called 6-1 T SRAM, when reading the logic value (bit to be read) of the SRAM cell 10, the voltage levels on the first bit line 12 and the second bit line 16 will be charged to a high voltage level flat. Subsequently, the voltage level of the word line 14 is raised to a high voltage level to turn on the field effect transistors Me, Mf. Then, the sense amplifier of the SRAM will judge the logic value stored in...

AI Technical Summary

Problems solved by technology

[0006] In addition, since the data writing and data reading of the traditional SRAM are all through the same switching transistor (such as figure 1 Field Effect Transistors Me, Mf), so the general traditional static random access memory must sacrifice one of the characteristics of the stability of data storage and the speed of data writing, but cannot have both

Moreover, with the evolution of the manufacturing process, the power supply voltage of the static random access memory will be lower and lower

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