Delay test method for video image processing system
A processing system, delay detection technology, applied in the direction of image communication, television, electrical components, etc., can solve the problem of not finding the system delay and so on
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[0015] The preferred embodiments of the present invention will be specifically described below in conjunction with the accompanying drawings.
[0016] Taking the PAL system video processing system as an example, the present invention will be further described.
[0017] Such as figure 2 , to test the video generator, with FPGA 2 as the core device, equipped with flash 6, SRAM 7 and video DA 8. The specific model currently in use is XC5VLX50T-FF11362. The flash 6 model K9F4G08UOA has a capacity of 4Gbit, the minimum read and write cycle can reach 25ns, and the data width is 8bit. PAL system DA8 chooses SAA7121H, which can convert CCIR656 digital video to PAL analog video. Its parameters can be configured through the I2C bus. The model of synchronous SRAM 7 is IDT71V65803 and the alternative model is GS880z183236b. The read and write speed of this type of SRAM can reach 150MHz, and the data width is 16bit.
[0018] Before the test, the host computer (PC) 1 edits the test im...
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