The invention provides a deterministic time
delay testing device and method,
electronic equipment and a storage medium, and belongs to the technical field of high-speed data converter serial interface systems. The testing device comprises a
clock source, an ADC, an FPGA and an
oscilloscope. Wherein the ADC and the FPGA are respectively connected with the
clock source, so that an ADC side
system reference
clock and an FPGA side
system reference clock generated by the clock source can be respectively received, and an ADC side local multi-frame clock and an FPGA side local multi-frame clock which are synchronous are respectively output. The
oscilloscope is connected with the clock source, the ADC and the FPGA, so that the
oscilloscope can monitor the target
time difference obtained by subtracting the rising edge time point of the ADC side
system reference clock from the rising edge time point of the FPGA side system reference clock and monitor the absolute value of the rising edge
delay difference between the ADC side local multi-frame clock and the FPGA side local multi-frame clock. The deterministic time
delay of the serial interface system of the high-speed data converter can be accurately determined through the absolute value of the target
time difference and the rising edge time delay difference monitored by the oscilloscope.