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Method for the deterministic execution and synchronisation of an information processing system comprising a plurality of processing cores executing system tasks

A technology for information processing systems and system tasks, applied in the field of embedded electronic systems, can solve the problem of not instructing the division of cores, and achieve the effect of ensuring high-level security and improving performance levels

Inactive Publication Date: 2011-10-12
原子能和辅助替代能源委员会
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The patent does not indicate how to continue to partition cores favorably between the different cores of the MPSoC architecture

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  • Method for the deterministic execution and synchronisation of an information processing system comprising a plurality of processing cores executing system tasks
  • Method for the deterministic execution and synchronisation of an information processing system comprising a plurality of processing cores executing system tasks
  • Method for the deterministic execution and synchronisation of an information processing system comprising a plurality of processing cores executing system tasks

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Embodiment Construction

[0044] According to the present invention, the mN-ET part and the mN-TT part of the microkernel share a set of scheduling lists for ready / idle / error tasks, wherein the order in the list is maintained by the mN-ET part, and the The content of each element is maintained by the mN-TT part. The mN-TT microkernel directly consults this list without local scheduling. The processing functions of the mN-TT and mN-ET parts also interact asynchronously through software interrupts. In fact, as soon as one of the parts has completed the system processing function of modifying the state of the shared information, a software interrupt is generated for the other part announcing this fact to it. The sender then continues its execution to perform remaining system or application tasks in parallel. Thus, when the mN-ET part modifies the list of ready tasks, it announces this fact to the mN-TT part, which then continues its execution. Instead, the mN-TT part announces a change in task state (w...

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Abstract

The present invention relates to an information processing system that comprises two processing cores. As the execution of an application by the system includes the execution of application tasks and the execution of system tasks, the system includes a micro-core that executes the system tasks directly related to hardware resources. The processing system includes: a computation portion mN-TT of the micro-core executing system tasks relating to the switching of tasks on a core A; a control portion mN-TT of the micro-core executing, on a core different from A, system tasks relating to the control of the task allocation order on core A. The invention can be used in microelectronics and installed in an electronic system having a high computation power.

Description

technical field [0001] The present invention relates to a method for deterministically executing and synchronizing an information handling system including multiple processing cores performing system tasks. The invention can be applied in particular in the field of microelectronics or in the field of embedded electronic systems with high computing power. Background technique [0002] The semiconductor industry is facing the disappointing fact that there is no longer any reliable way to significantly increase the performance levels of processors, at least not at the single-processor level. Only systems using multiple processors operating in parallel form a desirable approach to increasing the computing power of these systems. In fact, research conducted in the 1960s showed that the ratio between computing power and efficiency of parallel computing systems can be much higher than that of sequential systems. Today, new applications in fields such as multimedia, communication ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48
CPCG06F9/3851G06F9/5044G06F2209/483G06F9/4843G06F9/4806G06F9/468G06F9/3836G06F2209/5021
Inventor C·奥萨盖斯D·沙布罗尔D·樊尚
Owner 原子能和辅助替代能源委员会