System and method for realizing parallel decompression of hardware

A hardware implementation and decompression technology, applied in electrical components, code conversion, etc., can solve problems such as occupying large CPU resources, low efficiency, and unsuitable for hardware implementation.

Active Publication Date: 2011-11-16
BAIDU ONLINE NETWORK TECH (BEIJIBG) CO LTD
View PDF5 Cites 32 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Currently, the Gzip algorithm is generally used for data compression and decompression, and the data is processed through software algorithms. There are a large number of serial bit operations in the Gzip algorithm, and the efficiency of using software algorithms for processing is low.
[0004] Moreover, the Gzip decompression algorithm is implemented by software. Specifically, the Gzip decompression algorithm is a multi-level look-up table algorithm, and the Huffman (Huffman) decoding is completed by using a multi-level look-up table, that is, It is said that it may be necessary to look up the table multiple times to solve a code. The advantage of this method is that the memory usage is less, and most searches can be completed only once by looking up the table, and the efficiency is high, so it is widely used in software. The parallelism of the algorithm is low, and it will occupy a large amount of CPU resources in large-scale data processing, which is not suitable for hardware implementation.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • System and method for realizing parallel decompression of hardware
  • System and method for realizing parallel decompression of hardware
  • System and method for realizing parallel decompression of hardware

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0041] The present invention will be described and illustrated more fully below with exemplary embodiments of the present invention with reference to the accompanying drawings.

[0042] figure 1 A schematic structural diagram of a hardware-implemented system for parallel decompression provided by an embodiment of the present invention is shown.

[0043] Such as figure 1 As shown, a hardware implementation system 100 for parallel decompression includes: a variable-length bit operation module 102 , a Huffman code table recovery module 104 , a Huffman decoding module 106 and an Lz77 decoding module 108 .

[0044] Among them, the variable-length bit operation module (Bitwise_management) 102 is used to perform variable-length bit operations on the data to be decompressed to obtain variable-length data. For example, the variable-length bit operation module 102 is used to read new data from the first-in-first-out module (In_FIFO_if), output the data of the data bit width used in th...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a system and method for realizing parallel decompression of hardware. The system comprises a variable-length bit manipulation module, a Huffman table recovery module, a Huffman coding module and a decoding module, wherein the variable-length bit manipulation module is used for carrying out variable-length bit manipulation on to-be-decompressed data to acquire variable-length data; the Huffman table recovery module is used for recovering a Huffman table in accordance with the variable-length data; the Huffman coding module is used for executing Huffman coding in parallel in accordance with the Huffman table; and the decoding module is used for carrying out decoding in accordance with the Huffman coding result. According to the system and method for realizing the parallel decompression of hardware, an FPGA (field programmable gate array) is utilized to realize a Gzip decompressing function, a parallel decompression algorithm is utilized and a hardware circuit structure suitable for the algorithm is designed, thus improving the processing efficiency of the decompression greatly.

Description

technical field [0001] The present invention relates to data decompression technology, in particular to a parallel decompression hardware implementation system and method. Background technique [0002] In the large-scale data processing of the Internet, data compression and decompression is one of the very important means, which can greatly increase the effective capacity of the disk, and improve the effective bandwidth of input and output (I / O) during read and write operations, thus Effectively reduce the cost of Internet Data Center (IDC, Internet Data Center), and improve the execution speed of application layer programs. [0003] At present, the Gzip algorithm is generally used for data compression and decompression, and the data is processed through software algorithms. There are a large number of serial bit operations in the Gzip algorithm, and the efficiency of using software algorithms for processing is low. [0004] Moreover, the Gzip decompression algorithm is imp...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H03M7/40
Inventor 欧阳剑田甲子李浩华
Owner BAIDU ONLINE NETWORK TECH (BEIJIBG) CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products