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Method for trimming substrates in the manufacture of electronics

A kind of substrate, a useful technology, applied in the field of substrate manufacturing, can solve the problems such as unusable, and achieve the effect of reducing high-frequency and low-frequency roughness

Inactive Publication Date: 2011-12-07
SOITEC SA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0022] The disadvantage of RTA is that it acts substantially on surface roughness with high spatial frequencies, especially less than or equal to 10x10 μm 2
[0023] Another disadvantage of RTA is that RTA is performed at high temperature, i.e. usually at temperatures above 1,000°C
Therefore, RTA cannot be used for useful layers containing germanium (Ge), because germanium liquefies at 930°C

Method used

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  • Method for trimming substrates in the manufacture of electronics
  • Method for trimming substrates in the manufacture of electronics
  • Method for trimming substrates in the manufacture of electronics

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Embodiment Construction

[0053] figure 1 A semiconductor substrate 1 is described. The substrate 1 comprises a semiconductor useful layer 4 on at least one of its faces. The useful semiconductor layer 4 is, for example, a silicon (Si) or germanium (Ge) layer.

[0054] The semiconductor substrate 1 includes a set of stacked layers. In the case of a semiconductor-on-insulator (SeOI) type substrate 1 , layer 30 is typically an electrical insulator layer, such as an oxide layer, while layer 31 is a semiconductor support layer.

[0055] figure 1 This is schematically depicted with an exaggerated extent, the useful layer 4 comprising a rough free surface 7 . In the case of obtaining the substrate by transfer, the roughness is mainly caused by the fracture step before obtaining the substrate 1 . It should be noted that the roughness of the free surface 7 after fracture was measured at high frequency (scanned surface, 1x1 μm 2 ) is usually RMS value 50-100 Angstroms, and at low frequency (scanning surfa...

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Abstract

The invention relates to a method for modifying the surface of a semiconductor substrate (1), said substrate comprising a set of layers comprising a layer of semiconductor useful bodies on at least one face of said substrate (1) (4), the useful layer (4) comprises a rough free surface (7), the method is suitable for smoothing the free surface (7), the method is characterized in that the method comprises the following successive steps: forming the covering The protective layer (20) of the surface (7) of the useful layer (4), the thickness of the protective layer (20) is 1 to 3 times larger than the peak-valley distance of the surface (7) of the useful layer (4); at least one polishing-oxidation sequence, said sequence comprising the successive steps of: polishing the surface (21) of said protective layer (20), adjusting said polishing so as not to attack said useful layer (4), and utilizing the supplied oxygen The substrate (1) is thermally oxidized to convert a part of the useful layer (4) into an oxide layer (16), thereby reducing the roughness of the surface (7) of said useful layer (4).

Description

technical field [0001] The present invention relates to methods of modifying the surface of semiconductor substrates for microelectronic and / or optoelectronic applications. The invention relates in particular to the fabrication of semiconductor-on-insulator (SeOI) type substrates. Background technique [0002] SeOI substrates are currently used in the electronics industry. The SeOI substrate includes, for example, silicon-on-insulator (SOI) or germanium-on-insulator (GeOI). [0003] SeOI substrates can be produced in various ways, including in particular the formation of a weakened zone in the thickness of the original substrate (the so-called donor substrate), and the formation of a region of weakness between the donor substrate and the receiving substrate. ) after assembly, a method of forming a break in the region. The SeOI type substrate thus comprises at least two layers, one from the donor substrate and one from the receiver substrate. [0004] Smart Cut TM method...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/302H01L21/762
CPCH01L21/31053H01L21/76251H01L21/302H01L21/20H01L27/12
Inventor G·里乌
Owner SOITEC SA