On-chip Auxiliary Test System and Auxiliary Test Method for δς Analog-to-Digital Converter

Abstract

The invention relates to an on-chip auxiliary testing system of a delta-sigma analog-digital converter and an auxiliary testing method of the same. The on-chip auxiliary testing system comprises a memory module, a parallel port / serial port module and a control scheduling module integrated on the chip of the delta-sigma analog-digital converter; wherein one digital output end of the memory module is connected with the digital input end of the parallel port / serial port module, and the control signal output end of the control scheduling module is respectively connected with the control signal input ends of the memory module and the control scheduling module; and the control ends of the memory module and the control scheduling module are respectively used for receiving signals of the delta-sigma analog-digital converter. The auxiliary testing method comprises two auxiliary testing modes. When the device is used, no load is introduced into the PAD (pure audio design) for testing during operation of the delta-sigma analog-digital converter, the delta-sigma analog-digital converter stops operating when the performance of the chip is tested, the operation and testing of the delta-sigma analog-digital converter are separated, and the influence of the external testing environment on the operation of the chip can be minimized.

Description

technical field [0001] The invention belongs to the field of mixed-signal integrated circuit design, in particular to an on-chip auxiliary test system of a ΔΣ analog-to-digital converter and a test method thereof. Background technique [0002] ΔΣ (Delta-Sigma) analog-to-digital converter is based on oversampling and noise shaping technology, trades speed for precision, and can easily realize high-precision analog-to-digital conversion. The ΔΣ analog-to-digital converter is generally composed of two parts: a ΔΣ modulator and a digital decimation filter. The ΔΣ ADC generally has the following important parameters: the number of digits of the analog-to-digital converter N, the number of quantization bits of the modulator M, the oversampling rate OSR, and the sampling frequency Fs. The input analog signal first passes through the ΔΣ modulator to generate an M-bit modulation code. At this time, the data update frequency is Fs, and then the M-bit modulation code is converted into...

AI Technical Summary

Problems solved by technology

The logic analyzer will generate a lot of interference during the working process and the digital output will keep flipping on the PAD (pad) ring. These interferences will be coupled to the analog power supply through the coupling capacitance between the power supply and the signal line, and then interfere with the internal The working state of the analog part of the ΔΣ ADC affects the performance of the ΔΣ ADC

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