264results about How to "Remove load" patented technology

A system and method for reducing impedance loading of semiconductor integrated circuit devices implementing protective device structures that contributes to impedance loading at an I / O pad connection. The method comprises providing a fuse device between the I / O pad connection and the protective device; connecting a current source device associated with each fuse device in the integrated circuit, the current source device connected to one end of the fuse device; providing fuse selection circuit for activating current flow through a selected fuse device between the current source and the I / O connection, the current flow being of an amount sufficient for blowing the fuse and disconnecting the protective device from the circuit structure, thereby reducing impedance loading at the I / O connection. Such a system and method is employed in a memory system comprising integrated circuit chips disposed in a stacked relation, with each chip including: a layer of active circuitry formed at a first layer of each chip; a plurality of through conducting structures disposed substantially vertically through each chip for enabling electronic connection with active circuitry at the first layer; second conducting device disposed at an end of the through conducting structure at an opposite side of a chip for connection with a corresponding through conductive structure of an adjacent stacked chip, the stacked chip structure formed by aligning one or more through conducting structures and second conducting devices of adjacent chips, whereby a chip of the stack is electronically connected to active circuitry formed on other chips of the stack. The stacked chip structure is ideal for reducing data access latency in memory systems employing memory chips such as DRAM.

A four color liquid crystal display (LCD) including red, green, blue, and white sub-pixels are provided. The LCD also includes a plurality of gate lines for transmitting gate signals to the sub-pixels and a plurality of data lines for transmitting data signals to the sub-pixels. The white sub-pixel is smaller than the other sub-pixels, and each of the data lines passes between adjacent two sub-pixels and includes at least one curved portion. Furthermore, the lengths of the data lines are substantially uniform.

A low-loss, high-efficiency, broadband antenna including both electric and magnetic dipole radiators is provided herein. The broadband antenna may be referred to as a “P×M antenna” and may generally include a ground plane; a magnetic radiator formed within the ground plane; a conductive feed arranged within a first plane, which is parallel to the ground plane; and an electric radiator arranged within a second plane, which is perpendicular to the ground plane and coupled at one end to the conductive feed. According to a particular aspect of the invention, the electric and magnetic radiators are substantially complementary to one another and are coupled for producing a P×M radiation pattern over a broad range of operating frequencies. One advantage of the P×M antenna described herein is that the complementary antenna elements are combined without the use of a lossy, resistive matching network, thereby increasing the efficiency with which the P×M radiation pattern is produced.

A turbomachine includes a housing and a rotatable shaft, where at least a portion of the rotatable shaft is located in the housing. The turbomachine also includes a magnetic thrust bearing that axially positions the rotatable shaft and a radial bearing that centers the rotatable shaft. The turbomachine includes a flexure including a first portion secured to the housing and a second portion axially moveable relative to the first portion. The second portion of the flexure is connected to the radial bearing, and the second portion moves axially to eliminate thrust loads on the radial bearing and allow the magnetic thrust bearing to carry axial loads.