Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Low output ripple wave parallel power-factor correction (PFC) transform control method and device

A power factor correction and conversion control technology, which is applied in the direction of output power conversion device, sustainable manufacturing/processing, high-efficiency power electronic conversion, etc., can solve the problems of large DC output voltage ripple, low efficiency, and high cost of converter design , to increase the cut-off frequency, reduce the DC output voltage/current ripple, and improve the efficiency

Inactive Publication Date: 2012-04-25
SOUTHWEST JIAOTONG UNIV
View PDF2 Cites 12 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the cut-off frequency of the DC output voltage feedback control loop of the traditional active power factor correction converter is low (generally only 10-20Hz), which seriously affects the dynamic response capability of the power factor correction converter to load changes.
In addition, since the DC output voltage ripple of the active power factor correction converter is relatively large, it is necessary to connect a DC / DC converter to the output terminal of the power factor correction converter after connecting an output capacitor with a large capacitance value. Improve the steady-state accuracy of the load DC output voltage and the dynamic response capability to load changes, making the converter design cost high and low efficiency

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Low output ripple wave parallel power-factor correction (PFC) transform control method and device
  • Low output ripple wave parallel power-factor correction (PFC) transform control method and device
  • Low output ripple wave parallel power-factor correction (PFC) transform control method and device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment example

[0021] figure 2 It is shown that a specific embodiment of the present invention is a topology and control method of a constant current source switching power supply, and its specific method is:

[0022] The AC input power is connected to the rectifier bridge composed of D1, D2, D3, and D4 through the LC filter network of C1, C2, L1, and L2. The rectifier bridge outputs the VREC signal as the input of the flyback converter, and the transformer of the flyback converter T1 has 4 windings N12, N34, N56 and N78, N12 is the primary winding; N34 is the auxiliary winding that provides power to the flyback power factor controller, through D5, C4 generates VDD voltage to provide power to the flyback power factor controller ; N56 is the main output winding of the flyback converter, N56 winding passes through D6, C5 generates Vo+ to provide part of the energy for the load; N78 is another set of output windings of the flyback converter, N78 generates auxiliary power VAUX through D7 and C7...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a low output ripple wave parallel power-factor correction (PFC) transform control method and device. The output end of a single-phase PFC convertor (TD) is connected in parallel with the output end of a DC (direct current) / DC convertor (DC-DC), and meanwhile energy is supplied to a load; the output positive end of the single-phase PFC convertor is mutually connected with the output positive end of the DC / DC convertor so as to form a 'Vo+' end, and meanwhile, the 'Vo+' end is connected with the positive end of the load; the output negative end of the single-phase PFC convertor is mutually connected with the output negative end of the DC / DC convertor so as to form a 'Vo-' end, and meanwhile, and the 'Vo-' end is connected with the negative end of the load; an input power supply of the DC / DC convertor is an auxiliary power supply; and an input source of the auxiliary power supply can generate the output of a rectifier circuit (REC), and the single-phase PFC convertor (TD) also can generate the output of the rectifier circuit (REC). The control method provided by the invention has the advantages of eliminating double line frequency output ripples of the traditional PFC convertor, meanwhile, improving the dynamic response of a system, and overcoming the problems that the traditional two-stage power-factor correction convertor is low in efficiency and high in cost.

Description

technical field [0001] The invention relates to a low output ripple high efficiency PFC converter design method and a device thereof. Background technique [0002] In recent years, power electronics technology has developed rapidly, and power supply technology, which is an important part of the power electronics field, has gradually become a hot spot in application and research. Switching power supply has established its mainstream position in the field of power supply because of its high efficiency and high power density, but there is a fatal weakness when it is connected to the power grid through a rectifier: the power factor is low (generally only 0.45 to 0.75), Moreover, a large number of current harmonics and reactive power will be generated in the grid to pollute the grid. There are two main methods for suppressing harmonics generated by switching power supplies: one is the passive method, that is, using passive filtering or active filtering circuits to bypass or elim...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H02M1/14H02M1/42
CPCY02B70/126Y02B70/10Y02P80/10
Inventor 许建平阎铁生张婓高建龙
Owner SOUTHWEST JIAOTONG UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products