Level conversion enabling energy control circuit

Abstract

The invention relates to a level conversion enabling energy control circuit, which comprises a first current limiting module and a first MOS (Metal Oxide Semiconductor) pipe which are sequentially connected between an external power supply and the ground in series, a second current limiting module and a second MOS pipe which are sequentially connected between an external power supply and the ground in series, a first voltage clamp module which is connected between the drain electrode and the source electrode of the first MOS pipe in parallel, and a second voltage clamp module and a current limiting current limiting module which are connected between two ends of the second current limiting module in parallel and are mutually connected in series. According to the invention, the problem thatthe grid / source voltage VGS of the MOS pipe of the level conversion circuit is over-high is effectively avoided, and the voltage output by the circuit can start and close the subsequent controlled circuit without damage.

Description

technical field [0001] The invention relates to an integrated circuit, in particular to a level conversion enabling control circuit for a column drive circuit developed based on BCD technology (a monolithic integration technology for making bipolar, CMOS and DMOS devices on the same chip). Background technique [0002] In the column drive circuit (Source Driver) for large-size TFT-LCD screens, when the HV (High Voltage, high voltage) CMOS process is used for development, the MOS tube provided by the process has a large threshold voltage, a small transconductance, and conduction The resistance is large, so for large load applications, the area of ​​the output circuit will be relatively large. In order to solve the above problems, people in the industry began to use the characteristics of large transconductance and small on-resistance of LDMOS devices in the BCD process to develop column drive circuits for large-size TFT-LCD screens based on the BCD process, thereby reducing t...

AI Technical Summary

Problems solved by technology

[0007] For example in figure 2 Among them, when the input signal IN is high (=VDD), the gate voltage of the PMOS transistor M4" is GNDA, and the gate-source voltage of the PMOS transistor M4" is VDDA at this time, and the gate-source voltage of the PMOS transistor M4" will be too high And damage; when the input signal IN is low (ie = GND), similarly, the NMOS transistor M3" will also be damaged

[0008] 2. When it is disabled, since the gate-source voltage of the MOS transistor is too high at this time, it is enough to break down the gate oxide layer. Therefore, the output voltage of the level shift enabling control circuit cannot be directly used to turn off the DMOS Tube

[0009] To sum up, when the traditional level shifting enable control circuit is used in the BCD process, the main problem is that the gate voltage of the input MOS transistor (that is, the input signal IN) changes between 0 and VDDA, which will cause the gate voltage of the MOS transistor to change. The source voltage reaches VDDA at the highest, causing gate oxide breakdown, or gate liner breakdown

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