Unlock instant, AI-driven research and patent intelligence for your innovation.

FIFO (first in, first out) circuit capable of adjusting size of memory cells

A storage unit and circuit technology, applied in electrical digital data processing, data conversion, instruments, etc., can solve problems such as FIFO size constraints

Inactive Publication Date: 2012-07-25
SHANGHAI HUAHONG INTEGRATED CIRCUIT
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the size of the FIFO is constrained by the area of ​​the system chip

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FIFO (first in, first out) circuit capable of adjusting size of memory cells
  • FIFO (first in, first out) circuit capable of adjusting size of memory cells
  • FIFO (first in, first out) circuit capable of adjusting size of memory cells

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0014] specific implementation plan

[0015] The content proposed by the present invention will be described in detail below in conjunction with the accompanying drawings. figure 1 It is a structural block diagram of the adjustable size FIFO circuit proposed by the present invention. The dual-port SRAM is a FIFO storage unit. In the implementation, the storage unit is composed of four dual-port SRAMs as an example:

[0016] When the FIFO only needs to use part of the SRAM, the remaining SRAM can be used by other functional units in the system. The FIFO storage unit is composed of multiple SRAMs instead of one SRAM, so that the storage unit of the FIFO can be accessed by different functional units in the system at the same time.

[0017] image 3 The storage unit of the FIFO includes four dual-port SRAMs, a read signal selection logic unit and a write signal selection logic unit.

[0018] The read signal selection logic unit is used to send the read enable, read address, a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a FIFO (first in, first out) circuit capable of adjusting size of memory cells, which comprises FIFO memory cells, a write pointer generating logical unit, a write chip selection generating logical unit, a read chip selection generating logical unit, a read pointer generating logical unit and a FIFO state generating logical unit. By dynamically adjusting size of the FIFO memory cells, the FIFO circuit is capable of distributing free memory cells to other functional units on the premise that system performance demands are met, and accordingly, overall system performance is enhanced without changing system circuits.

Description

technical field [0001] The invention relates to a FIFO cache circuit, in particular to a FIFO circuit with adjustable storage unit size. Background technique [0002] FIFO (first-in-first-out buffer area) is a commonly used circuit structure in digital circuit design. Its main functions include: matching the difference in read and write speeds; isolating data paths in different clock domains, etc. [0003] The memory bank of the FIFO is usually a dual-port SRAM, one port is used as a write port, and the other port is used as a read port. The circuit structure diagram of ordinary FIFO is as follows: figure 2 As shown, the port on the left side of the SRAM is used for read operations, the port on the right side of the SRAM is used for write operations, and the FIFO state generation logic unit is used to generate the FIFO state "full", "empty" or other states. [0004] The size of FIFO will affect the performance of system circuit data transmission. The larger the FIFO, the ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F5/10
Inventor 迟志刚
Owner SHANGHAI HUAHONG INTEGRATED CIRCUIT