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Source-drain lightly-doping method, semiconductor device and manufacturing method thereof

A technology of lightly doped and lightly doped regions, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of no substantial effect of reducing parasitic capacitance, simple steps, etc., to improve the frequency response characteristics, the effect of reducing Miller capacitance, and reducing parasitic overlap capacitance

Inactive Publication Date: 2012-08-01
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The process steps of the prior art are simple but have no substantial effect on reducing parasitic capacitance

Method used

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  • Source-drain lightly-doping method, semiconductor device and manufacturing method thereof
  • Source-drain lightly-doping method, semiconductor device and manufacturing method thereof
  • Source-drain lightly-doping method, semiconductor device and manufacturing method thereof

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Embodiment Construction

[0022] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0023] In the source-drain light doping method provided by the embodiment of the present invention, the ion implantation direction of the source-drain light doping method is inclined to the source direction and forms an included angle with the direction perpendicular to the substrate. The present invention takes the preparation of NMOS transistors in CMOS device technology as an example.

[0024] Please refer to Figure 4A , first forming a gate structure 44 on a substrate 41, wherein the substrate includes a source region and a drain region;

[0025] Please refer to Figure 4B , with the gate structure 44 as a mask, the source region and the drain region in the substrate 41 on both sides of the gate structure 44 are lightly doped to...

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Abstract

The invention discloses a source-drain lightly-doping method. The ion implantation direction inclines towards the direction of a source and forms an included angle with the direction vertical to the substrate direction. Since the ion implantation direction is not vertical to the surface of a substrate, a source lightly-doping region and a drain lightly-doping region are in an asymmetric structure, the overlapping area between the drain lightly-doping region and the substrate below a grid structure is reduced, so that the parasitic overlapping capacitance between the drain and a grid is reduced, further the Miller capacitance of a common-source amplifier is reduced, and the frequency response characteristic of the common-source amplifier is effectively improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a source-drain light doping method, a semiconductor device and a manufacturing method thereof. Background technique [0002] CMOS (Complementary Metal Oxide Semiconductor) operational amplifier is one of the basic units of various circuits. With the development of information technology, the requirements for the processing speed of information data are getting higher and higher, and the requirements for the frequency response characteristics of the CMOS operational amplifiers used in it are also getting higher and higher. However, the parasitic capacitance of CMOS devices plays an increasingly negative role with the increase of operating frequency. How to reduce the influence of these parasitic capacitances on CMOS operational amplifiers has become the key to improving the frequency response characteristics of CMOS operational amplifiers. [0003] Miller capa...

Claims

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Application Information

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IPC IPC(8): H01L21/265H01L21/336H01L29/78
Inventor 俞柳江
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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