Flash memory structure and manufacturing and operation method thereof

Abstract

The invention discloses a flash memory structure and a manufacturing and operating method thereof. The flash memory structure includes a plurality of memory cell planes arranged in a three-dimensional manner. Each memory cell plane includes a plurality of word lines and a plurality of charge trapping composite layers arranged in a staggered manner, so that two adjacent word lines are configured with one of the charge trapping composite layers. The layers are separated from each other; multiple bit line groups and multiple source line groups are staggered and arranged perpendicularly to the plane of the memory cell; and multiple channel groups and multiple insulating pillar groups are staggered and arranged perpendicular to the plane of the memory cell, And each channel group is disposed between adjacent bit line groups and source line groups.

Description

Technical field [0001] The present invention relates to a three-dimensional flash memory structure and a manufacturing method and operation method thereof, and in particular to a three-dimensional stacked AND type flash memory structure and a manufacturing method and operation method thereof. Background technique [0002] A major feature of the design of non-volatile memory elements is that the integrity of the data state can still be preserved when the memory element loses or removes power. At present, many different types of non-volatile memory devices have been proposed in the industry. However, related industries are still constantly developing new designs or combining existing technologies to stack memory cell planes to achieve a memory structure with higher storage capacity. For example, some Not AND (NAND) flash memory structures with stacked thin film transistors have been proposed. [0003] However, in the process of manufacturing these three-dimensional NAND flash memor...

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Problems solved by technology

[0003] However, in the process of manufacturing these three-dimensional NAND flash memory structures, many key photolithography processes are required for each layer of memory cell planes, which is very time-consuming and cost-intensive

Although the three-dimensional structure can obtain higher memory density, the high cost also limits the development and application of the three-dimensional stacked flash memory structure.

[0004] Furthermore, since the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor) of the three-dimensional stacked NAND flash memory structure is arranged in series, the reading speed will be affected. with some delay

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