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Method for manufacturing embedded Si nanocrystalline SONOS device

A device manufacturing method, silicon nanocrystal technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as poor charge retention, poor durability, and device reliability, and achieve improved interface states and improved Reliability, improved interface effects

Inactive Publication Date: 2012-09-19
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, although the anti-gate and anti-drain interference capabilities of devices with a Si nanocrystalline silicon nitride layer SONOS structure have increased, due to the interface between the underlying silicon oxide layer and silicon, and the interface between nanocrystals and silicon nitride Affected, the reliability of the device is affected, the durability is poor, and the charge retention ability is also poor

Method used

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  • Method for manufacturing embedded Si nanocrystalline SONOS device
  • Method for manufacturing embedded Si nanocrystalline SONOS device
  • Method for manufacturing embedded Si nanocrystalline SONOS device

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Embodiment Construction

[0025] The purpose of the present invention is to improve the reliability of the SONOS device through two annealing processes, and perform the first annealing process after forming the first oxide layer to reduce the interface state density at the interface between the substrate and the first oxide layer , while forming a part of Si-N bonds on the surface of the first oxide layer; performing the second annealing after the formation of the second oxide layer can further improve the interface state, and at the same time improve the interface between silicon nanocrystals and silicon nitride, making nanocrystals The interface with silicon nitride is less prone to charge retention during program and erase processes, thereby improving the reliability of embedded nanocrystalline SONOS devices.

[0026] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the following in conjunction with the attached Figure ...

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Abstract

The invention discloses a method for manufacturing an embedded Si (silicon) nanocrystalline SONOS (silicon-oxide-nitride-oxide-silicon) device. The method comprises the following steps: forming a first oxide layer on a substrate in which a grate electrode is formed, and implementing the first annealing process; forming a silicon nitride layer on the first oxide layer, and embedding the Si nanocrystalline in the silicon nitride layer; forming a second oxide layer on the silicon nitride layer and implementing the secondary annealing process; and forming a Si layer on the second oxide layer, and adopting the Si layer as a control grate. According to the method, implements the first annealing process is implemented after the first oxide layer is formed so that the interface state density of the substrate and the interface of the first oxide layer is reduced, the secondary annealing process after forming the second oxide layer is formed on the silicon nitride layer is implemented so that the interface states of the substrate and the first oxide layer are further improved, and the interface between the Si nanocrystalline and the silicon nitride is improved so that the electric charge can retain on the interface between the nanocrystalline and the silicon nitride easily during the compiling and erasing process, so that the reliability of the embedded Si nanocrystalline SONOS device is improved.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for manufacturing an embedded silicon nanocrystal SONOS device. Background technique [0002] As SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon-silicon oxide-silicon nitride-silicon oxide-silicon) devices gradually replace floating gates as the main non-volatile memory, the compilation and improvement of SONOS devices Methods such as erasing speed, charge retention, and device endurance (Endurance) emerge in an endless stream. So far, researchers have conducted a lot of research work on improving the storage performance of SONOS devices, mainly focusing on the following aspects: [0003] 1. Introducing nanocrystals into the storage layer to obtain a deep potential well and improve the stability of captured charges; [0004] 2. By changing the atomic percentage of the silicon nitride layer to change the energy band structure and improve the stability...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8247
Inventor 田志谢欣云匡玉标
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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