Method for forming double stress etching barrier layer

Abstract

The invention discloses a method for forming a double stress etching barrier layer. A semiconductor device with a PMOS (p-channel metal oxide semiconductor) area and NMOS (n-channel metal oxide semiconductor) area is provided, wherein a high pressure stress silicon nitride layer on the NMOS area is etched for two times; dry etching is carried out on part of the high pressure stress silicon nitride layer on the NMOS area at the first time, so that part of the high pressure stress silicon nitride layer is remained on the NMOS area; far-end plasma chemical etching is carried out on the high pressure stress silicon nitride layer 3 on the NMOS area at the second time, so that the remained part of the high pressure stress silicon nitride layer is completely removed; and meanwhile, part of side of the high pressure stress silicon nitride layer which is not covered by a photoetching barrier layer on the PMOS area is etched. With the adoption of the method for forming the double stress etching barrier layer, the method for removing the high pressure stress silicon nitride layer above the NMOS area can be effectively improved, so that an overlapping area between the high pressure stress silicon nitride layer and a high tensile stress silicon nitride layer is leveled; and meanwhile, the overlapping area of SiN thin films with different stresses can be well treated, and thereby the yield of the product is improved.

Description

technical field [0001] The invention relates to a method for forming a double stress layer, in particular to a method for forming a double stress etching barrier layer. Background technique [0002] The strained silicon technology integration process has been widely used at the 45nm node. The so-called strained silicon technology refers to the formation of a stress layer that can generate stress on the substrate on the doped region, and the application of the stress layer can increase the mobility of carriers in the source and drain. The compressive stress along the channel direction can increase the mobility of holes, while the tensile stress along the channel direction can increase the mobility of electrons. In order to significantly improve the carrier mobility in the channel, the stress-introducing material layer is usually formed on the surface close to the channel, which can be realized by directly forming a stressed silicon nitride etch stop layer on the CMOS device....

AI Technical Summary

Problems solved by technology

It is used to solve the problem of yield loss caused by the unevenness of the overlapping area between the high-voltage stress silicon nitride layer and the high-tensile stress silicon nitride layer in the prior art

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