Semiconductor device

Abstract

The present invention relates to semiconductor devices. The semiconductor device includes a stacked first semiconductor substrate and a second semiconductor substrate; a first transmission line including a signal line and a ground line; a second transmission line including a signal line and a ground line; a first via layer for the signal line, formed by The conductor layer formed in the through hole is formed, connected to the signal line of the first transmission line and the signal line of the second transmission line; the first through hole layer for the ground line is formed of the conductor layer formed in the through hole, connected to the The ground line of the first transmission line and the ground line of the second transmission line; and the second via hole layer for the ground line, consisting of a conductor layer formed in the via hole, connected to the ground line of the first transmission line and / or the second The ground line of the transmission line, and includes a strip-shaped via layer formed opposite to the first via layer for the signal line. The semiconductor device of the present invention can strengthen the ground around the via layer for interconnecting transmission lines and can adjust the characteristic impedance of the via portion.

Description

[0001] Cross References to Related Applications [0002] The present invention contains subject matter related to the disclosure of Japanese Priority Patent Application JP 2011-087048 filed in the Japan Patent Office on Apr. 11, 2011, the entire content of which is hereby incorporated by reference. technical field [0003] The present invention relates to a semiconductor device having a plurality of semiconductor substrates on which high-frequency circuits are formed, and the high-frequency circuits of the respective semiconductor substrates are electrically connected to each other. Background technique [0004] Although the miniaturization of elements in semiconductor devices is currently progressing, miniaturization has recently become difficult due to the diffraction limit of photolithography. [0005] Then, for further integration, attempts have been made to increase the effective integration level by three-dimensionally stacking and integrating a plurality of semiconduc...

AI Technical Summary

Problems solved by technology

Therefore, the ground around the via layer is weakened

[0023] In addition, the size of the via layer and the ground layer is basically determined by the size of the coplanar line, so the degree of freedom of the size is low

Thus it is difficult to change the characteristic impedance of the via portion including the via layer

Therefore, when the upper high-frequency circuit and the lower high-frequency circuit have different characteristic impedances, it is difficult to achieve impedance matching

[0024] In the structure of Patent Document 2, in an ordinary semiconductor device, the circuit of the upper semiconductor substrate and the circuit of the lower semiconductor substrate are connected to each other only through the via layer, and no special consideration is given to the characteristic impedance of the via portion including the via layer

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