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Method for shaping resistance variable nonvolatile memory element and resistance variable nonvolatile memory device

A non-volatile storage and resistance-variable technology, which is applied in the field of shaping of resistance-variable non-volatile memory elements and resistance-variable non-volatile memory devices, and can solve the problem of increasing the shaping voltage of resistance-changing elements and shaping voltage Deviation and other issues

Active Publication Date: 2014-10-01
PANASONIC SEMICON SOLUTIONS CO LTD
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AI Technical Summary

Problems solved by technology

[0039] However, in the above-mentioned conventional variable resistance semiconductor memory device, there is a technical problem in that the shaping voltage varies for each variable resistance element constituting the memory cell array, or that in order to transition to the state where the resistance change starts, the Initially, the shaping voltage applied to the variable resistance element increases

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  • Method for shaping resistance variable nonvolatile memory element and resistance variable nonvolatile memory device
  • Method for shaping resistance variable nonvolatile memory element and resistance variable nonvolatile memory device
  • Method for shaping resistance variable nonvolatile memory element and resistance variable nonvolatile memory device

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Embodiment Construction

[0117] First, for Figure 29 The shown 1T1R type memory cell composed of a variable resistance element shows molding characteristics for the case where Pt (platinum) is used in the upper electrode 100c and the case where Ir (iridium) is used for the upper electrode 100c, And explain its technical problems, wherein the variable resistance element is composed of the first transition metal oxide layer 100b-1 (here, TaO x , 0y , x<y) to form.

[0118] Here, in the sample used in the experiment, the area of ​​the variable resistance layer 100b is 0.25 μm 2 (=0.5μm×0.5μm), having a first transition metal oxide layer 100b-1 (here, TaO x : X=1.54, film thickness: 44.5nm), and the second transition metal oxide layer 100b-2 (here, TaO y : y=2.47, film thickness: 5.5 nm). The NMOS transistor serving as a switching element has a gate width W: 0.44 μm, a gate length L: 0.18 μm, and a gate insulating film thickness Tox: 3.5 nm.

[0119] The second transition metal oxide layer 100b-2 (h...

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Abstract

The present invention provides a method for shaping a variable resistance nonvolatile memory element and a variable resistance nonvolatile memory device, which can reduce the shaping voltage and avoid the deviation of the shaping voltage in each variable resistance element compared with the past. . The shaping method is a shaping method for initializing the variable resistance element (100), including: a step of judging whether the current of the 1T1R type memory cell is greater than the reference current (S24); if it is judged to be not too large ("No" in S24), a step (S22) of applying a positive voltage pulse for shaping whose pulse width (Tp(n)) increases; and a step of applying a negative voltage pulse (S23) having a pulse width (Tn) below the pulse width (Tp(n)), Step (S24), applying step (S22) and applying step (S23) are repeated until shaping is completed.

Description

technical field [0001] The present invention relates to a molding (initialization) method for stably performing resistance change in a variable resistance nonvolatile memory element, and a variable resistance nonvolatile memory device having such a function, wherein the variable resistance nonvolatile memory element The volatile memory element reversibly changes its resistance value based on an electrical signal. Background technique [0002] In recent years, variable resistance nonvolatile memory devices (hereinafter also simply referred to as "Non-volatile memory device") research and development. The variable resistance element refers to an element that has a property of reversibly changing a resistance value according to an electric signal, and can store data corresponding to the resistance value in a non-volatile manner. [0003] As a nonvolatile memory device using a variable resistance element, it is generally known that a MOS transistor and a variable resistance el...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C13/00H01L27/10H01L45/00H01L49/00H10N99/00
CPCH01L27/2436G11C13/0069H01L45/08G11C2213/32G11C2013/0083H01L45/16G11C2213/79G11C13/0007H01L45/146H01L27/101G11C2013/0073H01L45/1233H10B63/30H10N70/24H10N70/011H10N70/826H10N70/8833
Inventor 河合贤岛川一彦片山幸治
Owner PANASONIC SEMICON SOLUTIONS CO LTD
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