Method for achieving MFCC (Mel Frequency Cepstrum Coefficient) parameter extraction by field-programmable gate array

A gate array and data technology, which is applied in speech analysis, speech recognition, instruments, etc., can solve problems such as long hardware development cycle, reduced calculation accuracy, and complex design

Inactive Publication Date: 2012-12-19
SHANDONG UNIV
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Problems solved by technology

[0004] MFCC has been widely used in the field of speech recognition; due to the nonlinear correspondence between Mel frequency and Hz frequency, the calculation accuracy of MFCC decreases with the increase of frequency; therefore, only low-frequency MFCC is often used in applications , and discard the medium and high frequency MFCC;) The ext...

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  • Method for achieving MFCC (Mel Frequency Cepstrum Coefficient) parameter extraction by field-programmable gate array
  • Method for achieving MFCC (Mel Frequency Cepstrum Coefficient) parameter extraction by field-programmable gate array
  • Method for achieving MFCC (Mel Frequency Cepstrum Coefficient) parameter extraction by field-programmable gate array

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Embodiment 1

[0083] Examples of the present invention Figure 1-10 As shown, a field programmable gate array (FPGA), including pre-emphasis processing module (1), framing processing module (2), windowing processing module (3), discrete power spectrum estimation module (4), Mel filter A device group module (5), a natural logarithm acquisition module (6) and a discrete cosine transform module (7), characterized in that the output of the pre-emphasis processing module (1) is connected to the input of the framing processing module (2); The output terminal of the frame processing module (2) is connected to the input terminal of the windowing processing module (3), and its enabling control terminal is respectively connected to the enabling terminal of the windowing processing module (3) and the discrete power spectrum estimation module (4) The output of the windowing processing module (3) is connected to the input of the discrete power spectrum estimation module (4); the output of the discrete p...

Embodiment 2

[0095] A method utilizing the above-mentioned Field Programmable Gate Array (FPGA) to realize speech MFCC parameter extraction, assuming that the speech signal to be extracted is a single audio signal of 8kHz sampling and 8bit quantization, the steps of the method are as follows:

[0096] 1) Preprocessing the speech signal to be tested

[0097] a. Perform pre-emphasis processing on the speech signal to be tested, so that the speech signal to be tested passes through a system function as H(z)=1-0.9375z -1 The pre-emphasis processing module improves the frequency spectrum of the high-frequency part in the speech signal, thereby increasing the resolution of the high-frequency part of the speech, where z is a complex variable;

[0098] b. The voice signal to be tested is processed in frames, and the frame of the signal is realized by using two FIFOs to store data mutually. The frame length is selected as 256 sampling values ​​for one frame, and the frame shift is 128 sampling valu...

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Abstract

The invention discloses a method for achieving MFCC (Mel Frequency Cepstrum Coefficient) parameter extraction by a field-programmable gate array. The method belongs to a signal processing technology of an electronic information. The device comprises pre-emphasis processing, framing processing module and the like, the parameter extraction method comprises the following steps of: carrying out the pre-emphasis processing, carrying out the framing processing, carrying out the windowing processing, carrying out discrete power spectrum estimation, carrying out Mel triangular filter bank filtering, carrying out natural logarithm and discrete cosine transform on a voice signal of to-be-extracted MFCC characteristic parameters to obtain the MFCC parameters. The invention has the beneficial effects that some modules developed by Xilinx are embedded in a Simulink bank by improving each part of data processing modules and by means of a System Generator development tool of an Xilinx company, fixed-point simulation is carried out in Simulink, and HDL (Hardware Description Language) files are generated and called in ISE, development of an MFCC characteristic extraction hardware is rapidly achieved, a signal processing speed and a research and development period are improved.

Description

technical field [0001] The invention relates to a method for realizing MFCC parameter extraction by using a field programmable gate array, which belongs to the technical field of signal processing in electronic information. Background technique [0002] MFCC is the abbreviation of Mel Frequency Cepstrum Coefficient (MFCC); Mel frequency is proposed based on the auditory characteristics of the human ear, and it has a nonlinear correspondence with Hz frequency; Mel frequency cepstrum coefficient is based on the relationship between them This relationship between the calculated Hz spectrum features; [0003] The analysis of MFCC focuses on the auditory characteristics of the human ear, because the height of the sound heard by the human ear is not linearly proportional to the frequency of the sound, and the Mel frequency scale is more in line with the auditory characteristics of the human ear; the so-called Mel frequency scale, it The value of is generally corresponding to the ...

Claims

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Application Information

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IPC IPC(8): G10L19/02G10L15/02
Inventor 马丕明吕桂龙
Owner SHANDONG UNIV
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