Semiconductor device and manufacturing method thereof

Abstract

The invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a patterned laminated structure and doped epitaxial semiconductor layers, wherein the patterned laminated structure is formed on a semiconductor substrate; the laminated structure comprises a silicon containing semiconductor layer, a gate dielectric layer and a gate layer in sequence from bottom to top; the doped epitaxial semiconductor layers selectively and epitaxially grow on two sides of the silicon containing semiconductor layer; and the epitaxial semiconductor layers form raised source and drain extension regions. According to the invention, shallow junction depths (or small thickness) of the source and drain extension regions and high concentration of an activated doping agent can be advantageously achieved.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the same. In particular, the present invention relates to semiconductor devices with epitaxial source and drain extensions and methods of manufacturing the same. Background technique [0002] Currently, millions of semiconductor devices are integrated to form very large scale integrated circuits. [0003] figure 1 A cross-sectional view of a conventional semiconductor device (transistor) is shown. A transistor generally includes a gate dielectric layer 140 on a semiconductor substrate and a gate layer 150 on the gate dielectric layer 140 . Sidewall spacers 160 and 165 are formed on sidewalls of the gate dielectric layer 140 and the gate layer 150 . The transistor generally further includes a pair of source-drain regions 110 on both sides of the gate layer 150 . In addition, a pair of source-drain extension regions 120 are formed in the surface region of the semic...

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Problems solved by technology

[0006] However, the inventors of the present invention have carried out in-depth research on this and found that the junction depth and active dopant concentration of the source and drain extension regions formed by ion implantation and laser melting / sub-melting annealing need to be further improved

Incidentally, although SIMS (Secondary Ion Mass Spectrometry) is commonly used to measure the dopant distribution after laser melting / submelting annealing, SIMS cannot tell whether the dopant is activated or not

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