Epitaxy defect analyzing structure and manufacturing method thereof as well as epitaxy defect analyzing method

A technology for epitaxial defects and manufacturing methods, applied in the fields of semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of incomplete consistency, production capacity, waste of labor, complicated processes, etc., to achieve strong operability and ensure accuracy Sex, the method is simple and fast effect

Active Publication Date: 2013-02-13
HANGZHOU SILAN INTEGRATED CIRCUIT +1
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In the traditional epitaxial defect analysis method, the epitaxial layer 11, the epitaxial layer 11, Substrate 10, defect type, quantity, density, shape, size, distance and other data in the transition zone from substrate to epitaxy, as well as on-site process data such as epitaxy temperature, gas flow rate, growth rate, cavity pressure, and furnace integrity However, the process of this method is complicated, and it is usually necessary to find relevant non-epitaxy substrates for simulation experiments. When a substrate problem is suspected, it is necessary to do enough experiments to provide more accurate results. More data, resulting in waste of materials, production capacity, and manpower. Since the substrate 10 formed with an epit

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  • Epitaxy defect analyzing structure and manufacturing method thereof as well as epitaxy defect analyzing method
  • Epitaxy defect analyzing structure and manufacturing method thereof as well as epitaxy defect analyzing method
  • Epitaxy defect analyzing structure and manufacturing method thereof as well as epitaxy defect analyzing method

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[0048] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0049] In the following description, many specific details are explained in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described here, and those skilled in the art can make similar popularizations without violating the connotation of the present invention. Therefore, the present invention is not limited by the specific implementation disclosed below.

[0050] The present invention will be further described below with reference to specific embodiments and drawings, but the protection scope of the present invention should not be limited by this.

[0051] See figure 2 , The present invention provides a method for manufacturing an ...

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Abstract

The invention provides an epitaxy defect analyzing structure, comprising a semiconductor substrate and an epitaxy layer, wherein an epitaxy growing region is formed on the surface of one part of the semiconductor substrate and the surface of the other part of the semiconductor substrate protected by a baffling layer protection region is exposed; and the epitaxy layer is formed on the epitaxy growing region. The invention further provides a manufacturing method of the epitaxy defect analyzing structure. The invention further provides an epitaxy defect analyzing method, comprising the following steps of: carrying out defect correlation analysis comparison on the semiconductor substrate protected by the baffling layer protection region in the epitaxy defect analyzing structure and the epitaxy layer formed in the epitaxy growing region; and judging whether an epitaxy defect in the epitaxy layer comes from an epitaxy process, an epitaxy front semiconductor substrate manufacturing process or the semiconductor substrate, so as to avoid the problem that selected samples in material selecting and epitaxy machining process are completely different due to the fact that the semiconductor substrate without epitaxy and the semiconductor substrate which is not extended are not the same semiconductor substrate.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing technology, and in particular relates to an epitaxial defect analysis structure, a manufacturing method of the epitaxial defect analysis structure and an analysis method of epitaxial defect by using the epitaxial defect analysis structure. Background technique [0002] The epitaxial process in the manufacture of integrated circuits is to grow the conductivity type, resistivity, thickness, The process of a new single crystal layer whose parameters such as lattice structure and integrity meet the product structure requirements is called an epitaxial layer. [0003] During the epitaxial deposition process, affected by the substrate and the epitaxial process, epitaxial defects (Epitaxy Defect) will appear in the epitaxial layer. The position of epitaxial defects in epitaxy can be divided into two categories: one is epitaxial defects on the surface, which can generally be observed ...

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Application Information

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IPC IPC(8): H01L21/66H01L21/02H01L23/544
Inventor 杨彦涛赵仲镛蒋敏蒋墨染谢波
Owner HANGZHOU SILAN INTEGRATED CIRCUIT
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