Preparation method for polycrystalline silicon groove grid and capable of avoiding holes

A trench gate, polysilicon technology, applied in semiconductor devices and other directions, can solve problems such as unfilled voids, and achieve the effect of improving filling capacity and improving device reliability.

Active Publication Date: 2013-04-10
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
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Problems solved by technology

However, since the V-shaped opening morphology is not formed, there is a risk of the void not being filled

Method used

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  • Preparation method for polycrystalline silicon groove grid and capable of avoiding holes
  • Preparation method for polycrystalline silicon groove grid and capable of avoiding holes
  • Preparation method for polycrystalline silicon groove grid and capable of avoiding holes

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Embodiment Construction

[0022] The present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments.

[0023] Such as figure 1 As shown in Fig. 2(a) - Fig. 2(e), the present invention provides a method for preparing a polysilicon trench gate. This preparation method can improve the polysilicon trench gate filling ability, and the preparation process is as follows:

[0024] 1) Defining a deep trench 4 on the silicon substrate 1 by plasma dry etching;

[0025] 2) Grown the gate oxide film 2 on the full silicon wafer in the furnace tube;

[0026] 3) Polysilicon 3 is deposited on the gate oxide film 2. Due to the high aspect ratio of the trench, it is easy to have a cavity 5 on the top of the deep trench 4 during the polysilicon filling process, forming such as figure 1 polysilicon trench gate shown;

[0027] 4) Coating photoresist 6 and exposing using the deep trench etching layout used in step 1), see Figure 2(a);

[0028] 5) Using a dry etc...

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Abstract

The invention discloses a preparation method for polycrystalline silicon groove grid and capable of avoiding holes. The preparation method comprises the following steps of (1) defining a deep groove with dry plasma etching on a silicon base, (2) growing grid oxidation film on an entire silicon slice, (3) depositing polycrystalline silicon on the grid oxidation film, (4) coating and exposing photoresist by using deep groove etching layout, (5) etching the polycrystalline silicon in the deep groove and enabling the cavity to be exposed and to form a slope morphology through the dry etching procedure which produces high by-product polymer, (6) removing the photoresist, (7) dry back etching the polycrystalline silicon in a dry and return method and enabling the polycrystalline silicon to be formed as a V-shaped morphology, and (8) depositing the polycrystalline silicon a second time to fill the deep groove. The method can improve the filling power of the polycrystalline silicon groove grid and avoid the forming of cavities in filling polycrystalline silicon in the deep groove, and further improve the reliability of a component.

Description

technical field [0001] The invention belongs to the manufacturing process of semiconductor integrated circuits, and relates to a preparation method of a polysilicon trench gate, in particular to a preparation method of a polysilicon trench gate avoiding voids. Background technique [0002] Such as figure 1 As shown, in the traditional polysilicon trench gate preparation process, usually the first step is to define the deep trench 4 by plasma etching, the second step is to grow the gate oxide film 2, and the third step is to deposit polysilicon 3. Due to the high aspect ratio of the trenches, voids 5 are likely to appear on top of the deep trenches 4 during the polysilicon filling process. The appearance of these voids will affect the subsequent reliability of the device. [0003] In order to remove the impact of voids on device reliability, the traditional approach is to expose the voids by adding a dry etching back step, and then deposit polysilicon to fill the voids. Ho...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28
Inventor 孙娟郁新举
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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