Check patentability & draft patents in minutes with Patsnap Eureka AI!

Dual-gate VDMOS device

A double-gate and gate technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problem of operating frequency drop

Active Publication Date: 2013-04-10
MAXIM INTEGRATED PROD INC
View PDF3 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Also, various parasitic capacitances in the device can cause the operating frequency to drop

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Dual-gate VDMOS device
  • Dual-gate VDMOS device
  • Dual-gate VDMOS device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0010] overview

[0011] Power devices such as buck converters typically require output devices with low resistance (for example, R ON ) and low gate capacitance, allowing increased operating frequency. Therefore, lower device capacitance allows higher operating and execution efficiencies to be achieved.

[0012] Accordingly, techniques for forming semiconductor devices, particularly VDMOS devices, that include double gates to reduce the gate-drain capacitance (C gd ). In one or more implementations, a semiconductor device includes a substrate having a first surface and a second surface. The substrate includes first and second bulk regions formed proximate to the first surface. Each body region includes a source region formed therein. The substrate further includes a drain region formed proximate to the second surface and an epitaxial region configured to act as a drift region between the drain region and the source region. In one embodiment, the epitaxial region inclu...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention relates to semiconductor devices, especially relates to a dual-gate VDMOS device. The semiconductor device includes a dual-gate configuration. In one or more implementations, the semiconductor device includes a substrate having a first surface and a second surface. The substrate includes a first and a second body region formed proximal to the first surface. Moreover, each body region includes a source region formed therein. The substrate further includes a drain region formed proximal to the second surface and an epitaxial region that is configured to function as a drift region between the drain region and the source regions. A dual-gate is formed over the first surface of the substrate. The dual-gate includes a first gate region and a second gate region that define a gap there between to reduce the gate to drain capacitance.

Description

Background technique [0001] In power application devices, power metal-oxide-semiconductor field-effect transistor (MOSFET) devices such as vertically diffused metal-oxide-semiconductor (VDMOS) devices are used because they are complemented by a bipolar-CMOS-DMOS (BCD) process Bipolar devices and complementary metal oxide semiconductor CMOS devices. For example, VDMOS devices can be used in power supplies, buck converters, and low-voltage motor controllers to provide power application functionality. [0002] The on-resistance of the device (“R ON ”), maximum breakdown voltage (“BV DSS ”) and total capacitance are important characteristics for VDMOS design. These characteristics are important operating parameters of VDMOS devices, which determine the application of these devices. On-resistance usually depends on the design and layout of the device, process conditions, temperature, drift region length , the doping concentration of the drift region, and the various materials us...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/0878H01L29/1095H01L29/42368H01L29/42372H01L29/42376H01L29/66719H01L29/7802
Inventor H·索布提T·K·麦圭尔D·L·斯奈德S·J·阿尔贝哈斯基
Owner MAXIM INTEGRATED PROD INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com